// SPDX-License-Identifier: GPL-2.0-only /* * This driver implements I2C master functionality using the LSI API2C * controller. * * NOTE: The controller has a limitation in that it can only do transfers of * maximum 255 bytes at a time. If a larger transfer is attempted, error code * (-EINVAL) is returned. */ #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/i2c.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/platform_device.h> #define SCL_WAIT_TIMEOUT_NS … #define I2C_XFER_TIMEOUT … #define I2C_STOP_TIMEOUT … #define FIFO_SIZE … #define SEQ_LEN … #define GLOBAL_CONTROL … #define GLOBAL_MST_EN … #define GLOBAL_SLV_EN … #define GLOBAL_IBML_EN … #define INTERRUPT_STATUS … #define INTERRUPT_ENABLE … #define INT_SLV … #define INT_MST … #define WAIT_TIMER_CONTROL … #define WT_EN … #define WT_VALUE(_x) … #define IBML_TIMEOUT … #define IBML_LOW_MEXT … #define IBML_LOW_SEXT … #define TIMER_CLOCK_DIV … #define I2C_BUS_MONITOR … #define BM_SDAC … #define BM_SCLC … #define BM_SDAS … #define BM_SCLS … #define SOFT_RESET … #define MST_COMMAND … #define CMD_BUSY … #define CMD_MANUAL … #define CMD_AUTO … #define CMD_SEQUENCE … #define MST_RX_XFER … #define MST_TX_XFER … #define MST_ADDR_1 … #define MST_ADDR_2 … #define MST_DATA … #define MST_TX_FIFO … #define MST_RX_FIFO … #define MST_INT_ENABLE … #define MST_INT_STATUS … #define MST_STATUS_RFL … #define MST_STATUS_TFL … #define MST_STATUS_SNS … #define MST_STATUS_SS … #define MST_STATUS_SCC … #define MST_STATUS_IP … #define MST_STATUS_TSS … #define MST_STATUS_AL … #define MST_STATUS_ND … #define MST_STATUS_NA … #define MST_STATUS_NAK … #define MST_STATUS_ERR … #define MST_TX_BYTES_XFRD … #define MST_RX_BYTES_XFRD … #define SLV_ADDR_DEC_CTL … #define SLV_ADDR_DEC_GCE … #define SLV_ADDR_DEC_OGCE … #define SLV_ADDR_DEC_SA1E … #define SLV_ADDR_DEC_SA1M … #define SLV_ADDR_DEC_SA2E … #define SLV_ADDR_DEC_SA2M … #define SLV_ADDR_1 … #define SLV_ADDR_2 … #define SLV_RX_CTL … #define SLV_RX_ACSA1 … #define SLV_RX_ACSA2 … #define SLV_RX_ACGCA … #define SLV_DATA … #define SLV_RX_FIFO … #define SLV_FIFO_DV1 … #define SLV_FIFO_DV2 … #define SLV_FIFO_AS … #define SLV_FIFO_TNAK … #define SLV_FIFO_STRC … #define SLV_FIFO_RSC … #define SLV_FIFO_STPC … #define SLV_FIFO_DV … #define SLV_INT_ENABLE … #define SLV_INT_STATUS … #define SLV_STATUS_RFH … #define SLV_STATUS_WTC … #define SLV_STATUS_SRS1 … #define SLV_STATUS_SRRS1 … #define SLV_STATUS_SRND1 … #define SLV_STATUS_SRC1 … #define SLV_STATUS_SRAT1 … #define SLV_STATUS_SRDRE1 … #define SLV_READ_DUMMY … #define SCL_HIGH_PERIOD … #define SCL_LOW_PERIOD … #define SPIKE_FLTR_LEN … #define SDA_SETUP_TIME … #define SDA_HOLD_TIME … /** * struct axxia_i2c_dev - I2C device context * @base: pointer to register struct * @msg: pointer to current message * @msg_r: pointer to current read message (sequence transfer) * @msg_xfrd: number of bytes transferred in tx_fifo * @msg_xfrd_r: number of bytes transferred in rx_fifo * @msg_err: error code for completed message * @msg_complete: xfer completion object * @dev: device reference * @adapter: core i2c abstraction * @i2c_clk: clock reference for i2c input clock * @bus_clk_rate: current i2c bus clock rate * @last: a flag indicating is this is last message in transfer * @slave: associated &i2c_client * @irq: platform device IRQ number */ struct axxia_i2c_dev { … }; static void i2c_int_disable(struct axxia_i2c_dev *idev, u32 mask) { … } static void i2c_int_enable(struct axxia_i2c_dev *idev, u32 mask) { … } /* * ns_to_clk - Convert time (ns) to clock cycles for the given clock frequency. */ static u32 ns_to_clk(u64 ns, u32 clk_mhz) { … } static int axxia_i2c_init(struct axxia_i2c_dev *idev) { … } static int i2c_m_rd(const struct i2c_msg *msg) { … } static int i2c_m_ten(const struct i2c_msg *msg) { … } static int i2c_m_recv_len(const struct i2c_msg *msg) { … } /* * axxia_i2c_empty_rx_fifo - Fetch data from RX FIFO and update SMBus block * transfer length if this is the first byte of such a transfer. */ static int axxia_i2c_empty_rx_fifo(struct axxia_i2c_dev *idev) { … } /* * axxia_i2c_fill_tx_fifo - Fill TX FIFO from current message buffer. * @return: Number of bytes left to transfer. */ static int axxia_i2c_fill_tx_fifo(struct axxia_i2c_dev *idev) { … } static void axxia_i2c_slv_fifo_event(struct axxia_i2c_dev *idev) { … } static irqreturn_t axxia_i2c_slv_isr(struct axxia_i2c_dev *idev) { … } static irqreturn_t axxia_i2c_isr(int irq, void *_dev) { … } static void axxia_i2c_set_addr(struct axxia_i2c_dev *idev, struct i2c_msg *msg) { … } /* The NAK interrupt will be sent _before_ issuing STOP command * so the controller might still be busy processing it. No * interrupt will be sent at the end so we have to poll for it */ static int axxia_i2c_handle_seq_nak(struct axxia_i2c_dev *idev) { … } static int axxia_i2c_xfer_seq(struct axxia_i2c_dev *idev, struct i2c_msg msgs[]) { … } static int axxia_i2c_xfer_msg(struct axxia_i2c_dev *idev, struct i2c_msg *msg, bool last) { … } /* This function checks if the msgs[] array contains messages compatible with * Sequence mode of operation. This mode assumes there will be exactly one * write of non-zero length followed by exactly one read of non-zero length, * both targeted at the same client device. */ static bool axxia_i2c_sequence_ok(struct i2c_msg msgs[], int num) { … } static int axxia_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { … } static int axxia_i2c_get_scl(struct i2c_adapter *adap) { … } static void axxia_i2c_set_scl(struct i2c_adapter *adap, int val) { … } static int axxia_i2c_get_sda(struct i2c_adapter *adap) { … } static struct i2c_bus_recovery_info axxia_i2c_recovery_info = …; static u32 axxia_i2c_func(struct i2c_adapter *adap) { … } static int axxia_i2c_reg_slave(struct i2c_client *slave) { … } static int axxia_i2c_unreg_slave(struct i2c_client *slave) { … } static const struct i2c_algorithm axxia_i2c_algo = …; static const struct i2c_adapter_quirks axxia_i2c_quirks = …; static int axxia_i2c_probe(struct platform_device *pdev) { … } static void axxia_i2c_remove(struct platform_device *pdev) { … } /* Match table for of_platform binding */ static const struct of_device_id axxia_i2c_of_match[] = …; MODULE_DEVICE_TABLE(of, axxia_i2c_of_match); static struct platform_driver axxia_i2c_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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