// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (c) 2014 Linaro Ltd. * Copyright (c) 2014 HiSilicon Limited. * * Now only support 7 bit address. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/i2c.h> #include <linux/io.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> /* Register Map */ #define HIX5I2C_CTRL … #define HIX5I2C_COM … #define HIX5I2C_ICR … #define HIX5I2C_SR … #define HIX5I2C_SCL_H … #define HIX5I2C_SCL_L … #define HIX5I2C_TXR … #define HIX5I2C_RXR … /* I2C_CTRL_REG */ #define I2C_ENABLE … #define I2C_UNMASK_TOTAL … #define I2C_UNMASK_START … #define I2C_UNMASK_END … #define I2C_UNMASK_SEND … #define I2C_UNMASK_RECEIVE … #define I2C_UNMASK_ACK … #define I2C_UNMASK_ARBITRATE … #define I2C_UNMASK_OVER … #define I2C_UNMASK_ALL … /* I2C_COM_REG */ #define I2C_NO_ACK … #define I2C_START … #define I2C_READ … #define I2C_WRITE … #define I2C_STOP … /* I2C_ICR_REG */ #define I2C_CLEAR_START … #define I2C_CLEAR_END … #define I2C_CLEAR_SEND … #define I2C_CLEAR_RECEIVE … #define I2C_CLEAR_ACK … #define I2C_CLEAR_ARBITRATE … #define I2C_CLEAR_OVER … #define I2C_CLEAR_ALL … /* I2C_SR_REG */ #define I2C_BUSY … #define I2C_START_INTR … #define I2C_END_INTR … #define I2C_SEND_INTR … #define I2C_RECEIVE_INTR … #define I2C_ACK_INTR … #define I2C_ARBITRATE_INTR … #define I2C_OVER_INTR … enum hix5hd2_i2c_state { … }; struct hix5hd2_i2c_priv { … }; static u32 hix5hd2_i2c_clr_pend_irq(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_i2c_clr_all_irq(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_i2c_disable_irq(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_i2c_enable_irq(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_i2c_drv_setrate(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_i2c_init(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_i2c_reset(struct hix5hd2_i2c_priv *priv) { … } static int hix5hd2_i2c_wait_bus_idle(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_rw_over(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_rw_handle_stop(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_read_handle(struct hix5hd2_i2c_priv *priv) { … } static void hix5hd2_write_handle(struct hix5hd2_i2c_priv *priv) { … } static int hix5hd2_rw_preprocess(struct hix5hd2_i2c_priv *priv) { … } static irqreturn_t hix5hd2_i2c_irq(int irqno, void *dev_id) { … } static void hix5hd2_i2c_message_start(struct hix5hd2_i2c_priv *priv, int stop) { … } static int hix5hd2_i2c_xfer_msg(struct hix5hd2_i2c_priv *priv, struct i2c_msg *msgs, int stop) { … } static int hix5hd2_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { … } static u32 hix5hd2_i2c_func(struct i2c_adapter *adap) { … } static const struct i2c_algorithm hix5hd2_i2c_algorithm = …; static int hix5hd2_i2c_probe(struct platform_device *pdev) { … } static void hix5hd2_i2c_remove(struct platform_device *pdev) { … } static int hix5hd2_i2c_runtime_suspend(struct device *dev) { … } static int hix5hd2_i2c_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops hix5hd2_i2c_pm_ops = …; static const struct of_device_id hix5hd2_i2c_match[] = …; MODULE_DEVICE_TABLE(of, hix5hd2_i2c_match); static struct platform_driver hix5hd2_i2c_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_ALIAS(…) …;
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