// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2013 STMicroelectronics * * I2C controller driver, used in STMicroelectronics devices. * * Author: Maxime Coquelin <[email protected]> */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/of.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> /* SSC registers */ #define SSC_BRG … #define SSC_TBUF … #define SSC_RBUF … #define SSC_CTL … #define SSC_IEN … #define SSC_STA … #define SSC_I2C … #define SSC_SLAD … #define SSC_REP_START_HOLD … #define SSC_START_HOLD … #define SSC_REP_START_SETUP … #define SSC_DATA_SETUP … #define SSC_STOP_SETUP … #define SSC_BUS_FREE … #define SSC_TX_FSTAT … #define SSC_RX_FSTAT … #define SSC_PRE_SCALER_BRG … #define SSC_CLR … #define SSC_NOISE_SUPP_WIDTH … #define SSC_PRSCALER … #define SSC_NOISE_SUPP_WIDTH_DATAOUT … #define SSC_PRSCALER_DATAOUT … /* SSC Control */ #define SSC_CTL_DATA_WIDTH_9 … #define SSC_CTL_DATA_WIDTH_MSK … #define SSC_CTL_BM … #define SSC_CTL_HB … #define SSC_CTL_PH … #define SSC_CTL_PO … #define SSC_CTL_SR … #define SSC_CTL_MS … #define SSC_CTL_EN … #define SSC_CTL_LPB … #define SSC_CTL_EN_TX_FIFO … #define SSC_CTL_EN_RX_FIFO … #define SSC_CTL_EN_CLST_RX … /* SSC Interrupt Enable */ #define SSC_IEN_RIEN … #define SSC_IEN_TIEN … #define SSC_IEN_TEEN … #define SSC_IEN_REEN … #define SSC_IEN_PEEN … #define SSC_IEN_AASEN … #define SSC_IEN_STOPEN … #define SSC_IEN_ARBLEN … #define SSC_IEN_NACKEN … #define SSC_IEN_REPSTRTEN … #define SSC_IEN_TX_FIFO_HALF … #define SSC_IEN_RX_FIFO_HALF_FULL … /* SSC Status */ #define SSC_STA_RIR … #define SSC_STA_TIR … #define SSC_STA_TE … #define SSC_STA_RE … #define SSC_STA_PE … #define SSC_STA_CLST … #define SSC_STA_AAS … #define SSC_STA_STOP … #define SSC_STA_ARBL … #define SSC_STA_BUSY … #define SSC_STA_NACK … #define SSC_STA_REPSTRT … #define SSC_STA_TX_FIFO_HALF … #define SSC_STA_TX_FIFO_FULL … #define SSC_STA_RX_FIFO_HALF … /* SSC I2C Control */ #define SSC_I2C_I2CM … #define SSC_I2C_STRTG … #define SSC_I2C_STOPG … #define SSC_I2C_ACKG … #define SSC_I2C_AD10 … #define SSC_I2C_TXENB … #define SSC_I2C_REPSTRTG … #define SSC_I2C_SLAVE_DISABLE … /* SSC Tx FIFO Status */ #define SSC_TX_FSTAT_STATUS … /* SSC Rx FIFO Status */ #define SSC_RX_FSTAT_STATUS … /* SSC Clear bit operation */ #define SSC_CLR_SSCAAS … #define SSC_CLR_SSCSTOP … #define SSC_CLR_SSCARBL … #define SSC_CLR_NACK … #define SSC_CLR_REPSTRT … /* SSC Clock Prescaler */ #define SSC_PRSC_VALUE … #define SSC_TXFIFO_SIZE … #define SSC_RXFIFO_SIZE … enum st_i2c_mode { … }; /** * struct st_i2c_timings - per-Mode tuning parameters * @rate: I2C bus rate * @rep_start_hold: I2C repeated start hold time requirement * @rep_start_setup: I2C repeated start set up time requirement * @start_hold: I2C start hold time requirement * @data_setup_time: I2C data set up time requirement * @stop_setup_time: I2C stop set up time requirement * @bus_free_time: I2C bus free time requirement * @sda_pulse_min_limit: I2C SDA pulse mini width limit */ struct st_i2c_timings { … }; /** * struct st_i2c_client - client specific data * @addr: 8-bit target addr, including r/w bit * @count: number of bytes to be transfered * @xfered: number of bytes already transferred * @buf: data buffer * @result: result of the transfer * @stop: last I2C msg to be sent, i.e. STOP to be generated */ struct st_i2c_client { … }; /** * struct st_i2c_dev - private data of the controller * @adap: I2C adapter for this controller * @dev: device for this controller * @base: virtual memory area * @complete: completion of I2C message * @irq: interrupt line for th controller * @clk: hw ssc block clock * @mode: I2C mode of the controller. Standard or Fast only supported * @scl_min_width_us: SCL line minimum pulse width in us * @sda_min_width_us: SDA line minimum pulse width in us * @client: I2C transfert information * @busy: I2C transfer on-going */ struct st_i2c_dev { … }; static inline void st_i2c_set_bits(void __iomem *reg, u32 mask) { … } static inline void st_i2c_clr_bits(void __iomem *reg, u32 mask) { … } /* * From I2C Specifications v0.5. * * All the values below have +10% margin added to be * compatible with some out-of-spec devices, * like HDMI link of the Toshiba 19AV600 TV. */ static struct st_i2c_timings i2c_timings[] = …; static void st_i2c_flush_rx_fifo(struct st_i2c_dev *i2c_dev) { … } static void st_i2c_soft_reset(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_hw_config() - Prepare SSC block, calculate and apply tuning timings * @i2c_dev: Controller's private data */ static void st_i2c_hw_config(struct st_i2c_dev *i2c_dev) { … } static int st_i2c_recover_bus(struct i2c_adapter *i2c_adap) { … } static int st_i2c_wait_free_bus(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_write_tx_fifo() - Write a byte in the Tx FIFO * @i2c_dev: Controller's private data * @byte: Data to write in the Tx FIFO */ static inline void st_i2c_write_tx_fifo(struct st_i2c_dev *i2c_dev, u8 byte) { … } /** * st_i2c_wr_fill_tx_fifo() - Fill the Tx FIFO in write mode * @i2c_dev: Controller's private data * * This functions fills the Tx FIFO with I2C transfert buffer when * in write mode. */ static void st_i2c_wr_fill_tx_fifo(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_rd_fill_tx_fifo() - Fill the Tx FIFO in read mode * @i2c_dev: Controller's private data * @max: Maximum amount of data to fill into the Tx FIFO * * This functions fills the Tx FIFO with fixed pattern when * in read mode to trigger clock. */ static void st_i2c_rd_fill_tx_fifo(struct st_i2c_dev *i2c_dev, int max) { … } static void st_i2c_read_rx_fifo(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_terminate_xfer() - Send either STOP or REPSTART condition * @i2c_dev: Controller's private data */ static void st_i2c_terminate_xfer(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_handle_write() - Handle FIFO empty interrupt in case of write * @i2c_dev: Controller's private data */ static void st_i2c_handle_write(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_handle_read() - Handle FIFO empty interrupt in case of read * @i2c_dev: Controller's private data */ static void st_i2c_handle_read(struct st_i2c_dev *i2c_dev) { … } /** * st_i2c_isr_thread() - Interrupt routine * @irq: interrupt number * @data: Controller's private data */ static irqreturn_t st_i2c_isr_thread(int irq, void *data) { … } /** * st_i2c_xfer_msg() - Transfer a single I2C message * @i2c_dev: Controller's private data * @msg: I2C message to transfer * @is_first: first message of the sequence * @is_last: last message of the sequence */ static int st_i2c_xfer_msg(struct st_i2c_dev *i2c_dev, struct i2c_msg *msg, bool is_first, bool is_last) { … } /** * st_i2c_xfer() - Transfer a single I2C message * @i2c_adap: Adapter pointer to the controller * @msgs: Pointer to data to be written. * @num: Number of messages to be executed */ static int st_i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num) { … } static int st_i2c_suspend(struct device *dev) { … } static int st_i2c_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(st_i2c_pm, st_i2c_suspend, st_i2c_resume); static u32 st_i2c_func(struct i2c_adapter *adap) { … } static const struct i2c_algorithm st_i2c_algo = …; static struct i2c_bus_recovery_info st_i2c_recovery_info = …; static int st_i2c_of_get_deglitch(struct device_node *np, struct st_i2c_dev *i2c_dev) { … } static int st_i2c_probe(struct platform_device *pdev) { … } static void st_i2c_remove(struct platform_device *pdev) { … } static const struct of_device_id st_i2c_match[] = …; MODULE_DEVICE_TABLE(of, st_i2c_match); static struct platform_driver st_i2c_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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