// SPDX-License-Identifier: GPL-2.0 /* * Driver for STMicroelectronics STM32 I2C controller * * This I2C controller is described in the STM32F429/439 Soc reference manual. * Please see below a link to the documentation: * http://www.st.com/resource/en/reference_manual/DM00031020.pdf * * Copyright (C) M'boumba Cedric Madianga 2016 * Copyright (C) STMicroelectronics 2017 * Author: M'boumba Cedric Madianga <[email protected]> * * This driver is based on i2c-st.c * */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/module.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/reset.h> #include "i2c-stm32.h" /* STM32F4 I2C offset registers */ #define STM32F4_I2C_CR1 … #define STM32F4_I2C_CR2 … #define STM32F4_I2C_DR … #define STM32F4_I2C_SR1 … #define STM32F4_I2C_SR2 … #define STM32F4_I2C_CCR … #define STM32F4_I2C_TRISE … #define STM32F4_I2C_FLTR … /* STM32F4 I2C control 1*/ #define STM32F4_I2C_CR1_POS … #define STM32F4_I2C_CR1_ACK … #define STM32F4_I2C_CR1_STOP … #define STM32F4_I2C_CR1_START … #define STM32F4_I2C_CR1_PE … /* STM32F4 I2C control 2 */ #define STM32F4_I2C_CR2_FREQ_MASK … #define STM32F4_I2C_CR2_FREQ(n) … #define STM32F4_I2C_CR2_ITBUFEN … #define STM32F4_I2C_CR2_ITEVTEN … #define STM32F4_I2C_CR2_ITERREN … #define STM32F4_I2C_CR2_IRQ_MASK … /* STM32F4 I2C Status 1 */ #define STM32F4_I2C_SR1_AF … #define STM32F4_I2C_SR1_ARLO … #define STM32F4_I2C_SR1_BERR … #define STM32F4_I2C_SR1_TXE … #define STM32F4_I2C_SR1_RXNE … #define STM32F4_I2C_SR1_BTF … #define STM32F4_I2C_SR1_ADDR … #define STM32F4_I2C_SR1_SB … #define STM32F4_I2C_SR1_ITEVTEN_MASK … #define STM32F4_I2C_SR1_ITBUFEN_MASK … #define STM32F4_I2C_SR1_ITERREN_MASK … /* STM32F4 I2C Status 2 */ #define STM32F4_I2C_SR2_BUSY … /* STM32F4 I2C Control Clock */ #define STM32F4_I2C_CCR_CCR_MASK … #define STM32F4_I2C_CCR_CCR(n) … #define STM32F4_I2C_CCR_FS … #define STM32F4_I2C_CCR_DUTY … /* STM32F4 I2C Trise */ #define STM32F4_I2C_TRISE_VALUE_MASK … #define STM32F4_I2C_TRISE_VALUE(n) … #define STM32F4_I2C_MIN_STANDARD_FREQ … #define STM32F4_I2C_MIN_FAST_FREQ … #define STM32F4_I2C_MAX_FREQ … #define HZ_TO_MHZ … /** * struct stm32f4_i2c_msg - client specific data * @addr: 8-bit target addr, including r/w bit * @count: number of bytes to be transferred * @buf: data buffer * @result: result of the transfer * @stop: last I2C msg to be sent, i.e. STOP to be generated */ struct stm32f4_i2c_msg { … }; /** * struct stm32f4_i2c_dev - private data of the controller * @adap: I2C adapter for this controller * @dev: device for this controller * @base: virtual memory area * @complete: completion of I2C message * @clk: hw i2c clock * @speed: I2C clock frequency of the controller. Standard or Fast are supported * @parent_rate: I2C clock parent rate in MHz * @msg: I2C transfer information */ struct stm32f4_i2c_dev { … }; static inline void stm32f4_i2c_set_bits(void __iomem *reg, u32 mask) { … } static inline void stm32f4_i2c_clr_bits(void __iomem *reg, u32 mask) { … } static void stm32f4_i2c_disable_irq(struct stm32f4_i2c_dev *i2c_dev) { … } static int stm32f4_i2c_set_periph_clk_freq(struct stm32f4_i2c_dev *i2c_dev) { … } static void stm32f4_i2c_set_rise_time(struct stm32f4_i2c_dev *i2c_dev) { … } static void stm32f4_i2c_set_speed_mode(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_hw_config() - Prepare I2C block * @i2c_dev: Controller's private data */ static int stm32f4_i2c_hw_config(struct stm32f4_i2c_dev *i2c_dev) { … } static int stm32f4_i2c_wait_free_bus(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_write_byte() - Write a byte in the data register * @i2c_dev: Controller's private data * @byte: Data to write in the register */ static void stm32f4_i2c_write_byte(struct stm32f4_i2c_dev *i2c_dev, u8 byte) { … } /** * stm32f4_i2c_write_msg() - Fill the data register in write mode * @i2c_dev: Controller's private data * * This function fills the data register with I2C transfer buffer */ static void stm32f4_i2c_write_msg(struct stm32f4_i2c_dev *i2c_dev) { … } static void stm32f4_i2c_read_msg(struct stm32f4_i2c_dev *i2c_dev) { … } static void stm32f4_i2c_terminate_xfer(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_handle_write() - Handle FIFO empty interrupt in case of write * @i2c_dev: Controller's private data */ static void stm32f4_i2c_handle_write(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_handle_read() - Handle FIFO empty interrupt in case of read * @i2c_dev: Controller's private data * * This function is called when a new data is received in data register */ static void stm32f4_i2c_handle_read(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_handle_rx_done() - Handle byte transfer finished interrupt * in case of read * @i2c_dev: Controller's private data * * This function is called when a new data is received in the shift register * but data register has not been read yet. */ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_handle_rx_addr() - Handle address matched interrupt in case of * controller receiver * @i2c_dev: Controller's private data */ static void stm32f4_i2c_handle_rx_addr(struct stm32f4_i2c_dev *i2c_dev) { … } /** * stm32f4_i2c_isr_event() - Interrupt routine for I2C bus event * @irq: interrupt number * @data: Controller's private data */ static irqreturn_t stm32f4_i2c_isr_event(int irq, void *data) { … } /** * stm32f4_i2c_isr_error() - Interrupt routine for I2C bus error * @irq: interrupt number * @data: Controller's private data */ static irqreturn_t stm32f4_i2c_isr_error(int irq, void *data) { … } /** * stm32f4_i2c_xfer_msg() - Transfer a single I2C message * @i2c_dev: Controller's private data * @msg: I2C message to transfer * @is_first: first message of the sequence * @is_last: last message of the sequence */ static int stm32f4_i2c_xfer_msg(struct stm32f4_i2c_dev *i2c_dev, struct i2c_msg *msg, bool is_first, bool is_last) { … } /** * stm32f4_i2c_xfer() - Transfer combined I2C message * @i2c_adap: Adapter pointer to the controller * @msgs: Pointer to data to be written. * @num: Number of messages to be executed */ static int stm32f4_i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num) { … } static u32 stm32f4_i2c_func(struct i2c_adapter *adap) { … } static const struct i2c_algorithm stm32f4_i2c_algo = …; static int stm32f4_i2c_probe(struct platform_device *pdev) { … } static void stm32f4_i2c_remove(struct platform_device *pdev) { … } static const struct of_device_id stm32f4_i2c_match[] = …; MODULE_DEVICE_TABLE(of, stm32f4_i2c_match); static struct platform_driver stm32f4_i2c_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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