linux/drivers/i2c/busses/i2c-bcm-kona.c

// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2013 Broadcom Corporation

#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/slab.h>

/* Hardware register offsets and field defintions */
#define CS_OFFSET
#define CS_ACK_SHIFT
#define CS_ACK_MASK
#define CS_ACK_CMD_GEN_START
#define CS_ACK_CMD_GEN_RESTART
#define CS_CMD_SHIFT
#define CS_CMD_CMD_NO_ACTION
#define CS_CMD_CMD_START_RESTART
#define CS_CMD_CMD_STOP
#define CS_EN_SHIFT
#define CS_EN_CMD_ENABLE_BSC

#define TIM_OFFSET
#define TIM_PRESCALE_SHIFT
#define TIM_P_SHIFT
#define TIM_NO_DIV_SHIFT
#define TIM_DIV_SHIFT

#define DAT_OFFSET

#define TOUT_OFFSET

#define TXFCR_OFFSET
#define TXFCR_FIFO_FLUSH_MASK
#define TXFCR_FIFO_EN_MASK

#define IER_OFFSET
#define IER_READ_COMPLETE_INT_MASK
#define IER_I2C_INT_EN_MASK
#define IER_FIFO_INT_EN_MASK
#define IER_NOACK_EN_MASK

#define ISR_OFFSET
#define ISR_RESERVED_MASK
#define ISR_CMDBUSY_MASK
#define ISR_READ_COMPLETE_MASK
#define ISR_SES_DONE_MASK
#define ISR_ERR_MASK
#define ISR_TXFIFOEMPTY_MASK
#define ISR_NOACK_MASK

#define CLKEN_OFFSET
#define CLKEN_AUTOSENSE_OFF_MASK
#define CLKEN_M_SHIFT
#define CLKEN_N_SHIFT
#define CLKEN_CLKEN_MASK

#define FIFO_STATUS_OFFSET
#define FIFO_STATUS_RXFIFO_EMPTY_MASK
#define FIFO_STATUS_TXFIFO_EMPTY_MASK

#define HSTIM_OFFSET
#define HSTIM_HS_MODE_MASK
#define HSTIM_HS_HOLD_SHIFT
#define HSTIM_HS_HIGH_PHASE_SHIFT
#define HSTIM_HS_SETUP_SHIFT

#define PADCTL_OFFSET
#define PADCTL_PAD_OUT_EN_MASK

#define RXFCR_OFFSET
#define RXFCR_NACK_EN_SHIFT
#define RXFCR_READ_COUNT_SHIFT
#define RXFIFORDOUT_OFFSET

/* Locally used constants */
#define MAX_RX_FIFO_SIZE
#define MAX_TX_FIFO_SIZE

#define STD_EXT_CLK_FREQ
#define HS_EXT_CLK_FREQ

#define CONTROLLER_CODE

#define I2C_TIMEOUT

/* Operations that can be commanded to the controller */
enum bcm_kona_cmd_t {};

enum bus_speed_index {};

enum hs_bus_speed_index {};

/* Internal divider settings for standard mode, fast mode and fast mode plus */
struct bus_speed_cfg {};

/* Internal divider settings for high-speed mode */
struct hs_bus_speed_cfg {};

static const struct bus_speed_cfg std_cfg_table[] =;

static const struct hs_bus_speed_cfg hs_cfg_table[] =;

struct bcm_kona_i2c_dev {};

static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev *dev,
					  enum bcm_kona_cmd_t cmd)
{}

static void bcm_kona_i2c_enable_clock(struct bcm_kona_i2c_dev *dev)
{}

static void bcm_kona_i2c_disable_clock(struct bcm_kona_i2c_dev *dev)
{}

static irqreturn_t bcm_kona_i2c_isr(int irq, void *devid)
{}

/* Wait for ISR_CMDBUSY_MASK to go low before writing to CS, DAT, or RCD */
static int bcm_kona_i2c_wait_if_busy(struct bcm_kona_i2c_dev *dev)
{}

/* Send command to I2C bus */
static int bcm_kona_send_i2c_cmd(struct bcm_kona_i2c_dev *dev,
				 enum bcm_kona_cmd_t cmd)
{}

/* Read a single RX FIFO worth of data from the i2c bus */
static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev *dev,
					 uint8_t *buf, unsigned int len,
					 unsigned int last_byte_nak)
{}

/* Read any amount of data using the RX FIFO from the i2c bus */
static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev *dev,
				  struct i2c_msg *msg)
{}

/* Write a single byte of data to the i2c bus */
static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data,
				   unsigned int nak_expected)
{}

/* Write a single TX FIFO worth of data to the i2c bus */
static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev,
					  uint8_t *buf, unsigned int len)
{}


/* Write any amount of data using TX FIFO to the i2c bus */
static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev,
				   struct i2c_msg *msg)
{}

/* Send i2c address */
static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev *dev,
				     struct i2c_msg *msg)
{}

static void bcm_kona_i2c_enable_autosense(struct bcm_kona_i2c_dev *dev)
{}

static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev *dev)
{}

static void bcm_kona_i2c_config_timing_hs(struct bcm_kona_i2c_dev *dev)
{}

static int bcm_kona_i2c_switch_to_hs(struct bcm_kona_i2c_dev *dev)
{}

static int bcm_kona_i2c_switch_to_std(struct bcm_kona_i2c_dev *dev)
{}

static int bcm_kona_i2c_xfer(struct i2c_adapter *adapter,
			     struct i2c_msg msgs[], int num)
{}

static uint32_t bcm_kona_i2c_functionality(struct i2c_adapter *adap)
{}

static const struct i2c_algorithm bcm_algo =;

static int bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev *dev)
{}

static int bcm_kona_i2c_probe(struct platform_device *pdev)
{}

static void bcm_kona_i2c_remove(struct platform_device *pdev)
{}

static const struct of_device_id bcm_kona_i2c_of_match[] =;
MODULE_DEVICE_TABLE(of, bcm_kona_i2c_of_match);

static struct platform_driver bcm_kona_i2c_driver =;
module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();