// SPDX-License-Identifier: GPL-2.0-only // Copyright (C) 2014 Broadcom Corporation #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/sched.h> #include <linux/slab.h> #define N_DATA_REGS … /* * PER_I2C/BSC count register mask depends on 1 byte/4 byte data register * size. Cable modem and DSL SoCs with Peripheral i2c cores use 1 byte per * data register whereas STB SoCs use 4 byte per data register transfer, * account for this difference in total count per transaction and mask to * use. */ #define BSC_CNT_REG1_MASK(nb) … #define BSC_CNT_REG1_SHIFT … /* BSC CTL register field definitions */ #define BSC_CTL_REG_DTF_MASK … #define BSC_CTL_REG_SCL_SEL_MASK … #define BSC_CTL_REG_SCL_SEL_SHIFT … #define BSC_CTL_REG_INT_EN_MASK … #define BSC_CTL_REG_INT_EN_SHIFT … #define BSC_CTL_REG_DIV_CLK_MASK … /* BSC_IIC_ENABLE r/w enable and interrupt field definitions */ #define BSC_IIC_EN_RESTART_MASK … #define BSC_IIC_EN_NOSTART_MASK … #define BSC_IIC_EN_NOSTOP_MASK … #define BSC_IIC_EN_NOACK_MASK … #define BSC_IIC_EN_INTRP_MASK … #define BSC_IIC_EN_ENABLE_MASK … /* BSC_CTLHI control register field definitions */ #define BSC_CTLHI_REG_INPUT_SWITCHING_LEVEL_MASK … #define BSC_CTLHI_REG_DATAREG_SIZE_MASK … #define BSC_CTLHI_REG_IGNORE_ACK_MASK … #define BSC_CTLHI_REG_WAIT_DIS_MASK … #define I2C_TIMEOUT … /* Condition mask used for non combined transfer */ #define COND_RESTART … #define COND_NOSTART … #define COND_NOSTOP … #define COND_START_STOP … /* BSC data transfer direction */ #define DTF_WR_MASK … #define DTF_RD_MASK … /* BSC data transfer direction combined format */ #define DTF_RD_WR_MASK … #define DTF_WR_RD_MASK … #define INT_ENABLE … #define INT_DISABLE … /* BSC block register map structure to cache fields to be written */ struct bsc_regs { … }; struct bsc_clk_param { … }; enum bsc_xfer_cmd { … }; static char const *cmd_string[] = …; enum bus_speeds { … }; static const struct bsc_clk_param bsc_clk[] = …; struct brcmstb_i2c_dev { … }; /* register accessors for both be and le cpu arch */ #ifdef CONFIG_CPU_BIG_ENDIAN #define __bsc_readl … #define __bsc_writel … #else #define __bsc_readl(_reg) … #define __bsc_writel(_val, _reg) … #endif #define bsc_readl(_dev, _reg) … #define bsc_writel(_dev, _val, _reg) … static inline int brcmstb_i2c_get_xfersz(struct brcmstb_i2c_dev *dev) { … } static inline int brcmstb_i2c_get_data_regsz(struct brcmstb_i2c_dev *dev) { … } static void brcmstb_i2c_enable_disable_irq(struct brcmstb_i2c_dev *dev, bool int_en) { … } static irqreturn_t brcmstb_i2c_isr(int irq, void *devid) { … } /* Wait for device to be ready */ static int brcmstb_i2c_wait_if_busy(struct brcmstb_i2c_dev *dev) { … } /* i2c xfer completion function, handles both irq and polling mode */ static int brcmstb_i2c_wait_for_completion(struct brcmstb_i2c_dev *dev) { … } /* Set xfer START/STOP conditions for subsequent transfer */ static void brcmstb_set_i2c_start_stop(struct brcmstb_i2c_dev *dev, u32 cond_flag) { … } /* Send I2C request check completion */ static int brcmstb_send_i2c_cmd(struct brcmstb_i2c_dev *dev, enum bsc_xfer_cmd cmd) { … } /* Actual data transfer through the BSC controller */ static int brcmstb_i2c_xfer_bsc_data(struct brcmstb_i2c_dev *dev, u8 *buf, unsigned int len, struct i2c_msg *pmsg) { … } /* Write a single byte of data to the i2c bus */ static int brcmstb_i2c_write_data_byte(struct brcmstb_i2c_dev *dev, u8 *buf, unsigned int nak_expected) { … } /* Send i2c address */ static int brcmstb_i2c_do_addr(struct brcmstb_i2c_dev *dev, struct i2c_msg *msg) { … } static int brcmstb_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg msgs[], int num) { … } static int brcmstb_i2c_xfer_atomic(struct i2c_adapter *adapter, struct i2c_msg msgs[], int num) { … } static u32 brcmstb_i2c_functionality(struct i2c_adapter *adap) { … } static const struct i2c_algorithm brcmstb_i2c_algo = …; static void brcmstb_i2c_set_bus_speed(struct brcmstb_i2c_dev *dev) { … } static void brcmstb_i2c_set_bsc_reg_defaults(struct brcmstb_i2c_dev *dev) { … } #define AUTOI2C_CTRL0 … #define AUTOI2C_CTRL0_RELEASE_BSC … static int bcm2711_release_bsc(struct brcmstb_i2c_dev *dev) { … } static int brcmstb_i2c_probe(struct platform_device *pdev) { … } static void brcmstb_i2c_remove(struct platform_device *pdev) { … } static int brcmstb_i2c_suspend(struct device *dev) { … } static int brcmstb_i2c_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(brcmstb_i2c_pm, brcmstb_i2c_suspend, brcmstb_i2c_resume); static const struct of_device_id brcmstb_i2c_of_match[] = …; MODULE_DEVICE_TABLE(of, brcmstb_i2c_of_match); static struct platform_driver brcmstb_i2c_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux