/* include/video/s1d13xxxfb.h * * (c) 2004 Simtec Electronics * (c) 2005 Thibaut VARENE <[email protected]> * * Header file for Epson S1D13XXX driver code * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. */ #ifndef S1D13XXXFB_H #define S1D13XXXFB_H #define S1D_PALETTE_SIZE … #define S1D_FBID … #define S1D_DEVICENAME … /* S1DREG_REV_CODE register = prod_id (6 bits) + revision (2 bits) */ #define S1D13505_PROD_ID … #define S1D13506_PROD_ID … #define S1D13806_PROD_ID … /* register definitions (tested on s1d13896) */ #define S1DREG_REV_CODE … #define S1DREG_MISC … #define S1DREG_GPIO_CNF0 … #define S1DREG_GPIO_CNF1 … #define S1DREG_GPIO_CTL0 … #define S1DREG_GPIO_CTL1 … #define S1DREG_CNF_STATUS … #define S1DREG_CLK_CNF … #define S1DREG_LCD_CLK_CNF … #define S1DREG_CRT_CLK_CNF … #define S1DREG_MPLUG_CLK_CNF … #define S1DREG_CPU2MEM_WST_SEL … #define S1DREG_MEM_CNF … #define S1DREG_SDRAM_REF_RATE … #define S1DREG_SDRAM_TC0 … #define S1DREG_SDRAM_TC1 … #define S1DREG_PANEL_TYPE … #define S1DREG_MOD_RATE … #define S1DREG_LCD_DISP_HWIDTH … #define S1DREG_LCD_NDISP_HPER … #define S1DREG_TFT_FPLINE_START … #define S1DREG_TFT_FPLINE_PWIDTH … #define S1DREG_LCD_DISP_VHEIGHT0 … #define S1DREG_LCD_DISP_VHEIGHT1 … #define S1DREG_LCD_NDISP_VPER … #define S1DREG_TFT_FPFRAME_START … #define S1DREG_TFT_FPFRAME_PWIDTH … #define S1DREG_LCD_DISP_MODE … #define S1DREG_LCD_MISC … #define S1DREG_LCD_DISP_START0 … #define S1DREG_LCD_DISP_START1 … #define S1DREG_LCD_DISP_START2 … #define S1DREG_LCD_MEM_OFF0 … #define S1DREG_LCD_MEM_OFF1 … #define S1DREG_LCD_PIX_PAN … #define S1DREG_LCD_DISP_FIFO_HTC … #define S1DREG_LCD_DISP_FIFO_LTC … #define S1DREG_CRT_DISP_HWIDTH … #define S1DREG_CRT_NDISP_HPER … #define S1DREG_CRT_HRTC_START … #define S1DREG_CRT_HRTC_PWIDTH … #define S1DREG_CRT_DISP_VHEIGHT0 … #define S1DREG_CRT_DISP_VHEIGHT1 … #define S1DREG_CRT_NDISP_VPER … #define S1DREG_CRT_VRTC_START … #define S1DREG_CRT_VRTC_PWIDTH … #define S1DREG_TV_OUT_CTL … #define S1DREG_CRT_DISP_MODE … #define S1DREG_CRT_DISP_START0 … #define S1DREG_CRT_DISP_START1 … #define S1DREG_CRT_DISP_START2 … #define S1DREG_CRT_MEM_OFF0 … #define S1DREG_CRT_MEM_OFF1 … #define S1DREG_CRT_PIX_PAN … #define S1DREG_CRT_DISP_FIFO_HTC … #define S1DREG_CRT_DISP_FIFO_LTC … #define S1DREG_LCD_CUR_CTL … #define S1DREG_LCD_CUR_START … #define S1DREG_LCD_CUR_XPOS0 … #define S1DREG_LCD_CUR_XPOS1 … #define S1DREG_LCD_CUR_YPOS0 … #define S1DREG_LCD_CUR_YPOS1 … #define S1DREG_LCD_CUR_BCTL0 … #define S1DREG_LCD_CUR_GCTL0 … #define S1DREG_LCD_CUR_RCTL0 … #define S1DREG_LCD_CUR_BCTL1 … #define S1DREG_LCD_CUR_GCTL1 … #define S1DREG_LCD_CUR_RCTL1 … #define S1DREG_LCD_CUR_FIFO_HTC … #define S1DREG_CRT_CUR_CTL … #define S1DREG_CRT_CUR_START … #define S1DREG_CRT_CUR_XPOS0 … #define S1DREG_CRT_CUR_XPOS1 … #define S1DREG_CRT_CUR_YPOS0 … #define S1DREG_CRT_CUR_YPOS1 … #define S1DREG_CRT_CUR_BCTL0 … #define S1DREG_CRT_CUR_GCTL0 … #define S1DREG_CRT_CUR_RCTL0 … #define S1DREG_CRT_CUR_BCTL1 … #define S1DREG_CRT_CUR_GCTL1 … #define S1DREG_CRT_CUR_RCTL1 … #define S1DREG_CRT_CUR_FIFO_HTC … #define S1DREG_BBLT_CTL0 … #define S1DREG_BBLT_CTL1 … #define S1DREG_BBLT_CC_EXP … #define S1DREG_BBLT_OP … #define S1DREG_BBLT_SRC_START0 … #define S1DREG_BBLT_SRC_START1 … #define S1DREG_BBLT_SRC_START2 … #define S1DREG_BBLT_DST_START0 … #define S1DREG_BBLT_DST_START1 … #define S1DREG_BBLT_DST_START2 … #define S1DREG_BBLT_MEM_OFF0 … #define S1DREG_BBLT_MEM_OFF1 … #define S1DREG_BBLT_WIDTH0 … #define S1DREG_BBLT_WIDTH1 … #define S1DREG_BBLT_HEIGHT0 … #define S1DREG_BBLT_HEIGHT1 … #define S1DREG_BBLT_BGC0 … #define S1DREG_BBLT_BGC1 … #define S1DREG_BBLT_FGC0 … #define S1DREG_BBLT_FGC1 … #define S1DREG_LKUP_MODE … #define S1DREG_LKUP_ADDR … #define S1DREG_LKUP_DATA … #define S1DREG_PS_CNF … #define S1DREG_PS_STATUS … #define S1DREG_CPU2MEM_WDOGT … #define S1DREG_COM_DISP_MODE … #define S1DREG_DELAYOFF … #define S1DREG_DELAYON … #define BBLT_SOLID_FILL … /* Note: all above defines should go in separate header files when implementing other S1D13xxx chip support. */ struct s1d13xxxfb_regval { … }; struct s1d13xxxfb_par { … }; struct s1d13xxxfb_pdata { … }; #endif
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