linux/drivers/media/i2c/adv7343_regs.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * ADV7343 encoder related structure and register definitions
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 */

#ifndef ADV7343_REGS_H
#define ADV7343_REGS_H

struct adv7343_std_info {};

/* Register offset macros */
#define ADV7343_POWER_MODE_REG
#define ADV7343_MODE_SELECT_REG
#define ADV7343_MODE_REG0

#define ADV7343_DAC2_OUTPUT_LEVEL

#define ADV7343_SOFT_RESET

#define ADV7343_HD_MODE_REG1
#define ADV7343_HD_MODE_REG2
#define ADV7343_HD_MODE_REG3
#define ADV7343_HD_MODE_REG4
#define ADV7343_HD_MODE_REG5
#define ADV7343_HD_MODE_REG6

#define ADV7343_HD_MODE_REG7

#define ADV7343_SD_MODE_REG1
#define ADV7343_SD_MODE_REG2
#define ADV7343_SD_MODE_REG3
#define ADV7343_SD_MODE_REG4
#define ADV7343_SD_MODE_REG5
#define ADV7343_SD_MODE_REG6
#define ADV7343_SD_MODE_REG7
#define ADV7343_SD_MODE_REG8

#define ADV7343_FSC_REG0
#define ADV7343_FSC_REG1
#define ADV7343_FSC_REG2
#define ADV7343_FSC_REG3

#define ADV7343_SD_CGMS_WSS0

#define ADV7343_SD_HUE_REG
#define ADV7343_SD_BRIGHTNESS_WSS

/* Default values for the registers */
#define ADV7343_POWER_MODE_REG_DEFAULT
#define ADV7343_HD_MODE_REG1_DEFAULT
#define ADV7343_HD_MODE_REG2_DEFAULT
#define ADV7343_HD_MODE_REG3_DEFAULT
#define ADV7343_HD_MODE_REG4_DEFAULT
#define ADV7343_HD_MODE_REG5_DEFAULT
#define ADV7343_HD_MODE_REG6_DEFAULT
#define ADV7343_HD_MODE_REG7_DEFAULT
#define ADV7343_SD_MODE_REG8_DEFAULT
#define ADV7343_SOFT_RESET_DEFAULT
#define ADV7343_COMPOSITE_POWER_VALUE
#define ADV7343_COMPONENT_POWER_VALUE
#define ADV7343_SVIDEO_POWER_VALUE
#define ADV7343_SD_HUE_REG_DEFAULT
#define ADV7343_SD_BRIGHTNESS_WSS_DEFAULT

#define ADV7343_SD_CGMS_WSS0_DEFAULT

#define ADV7343_SD_MODE_REG1_DEFAULT
#define ADV7343_SD_MODE_REG2_DEFAULT
#define ADV7343_SD_MODE_REG3_DEFAULT
#define ADV7343_SD_MODE_REG4_DEFAULT
#define ADV7343_SD_MODE_REG5_DEFAULT
#define ADV7343_SD_MODE_REG6_DEFAULT
#define ADV7343_SD_MODE_REG7_DEFAULT
#define ADV7343_SD_MODE_REG8_DEFAULT

/* Bit masks for Mode Select Register */
#define INPUT_MODE_MASK
#define SD_INPUT_MODE
#define HD_720P_INPUT_MODE
#define HD_1080I_INPUT_MODE

/* Bit masks for Mode Register 0 */
#define TEST_PATTERN_BLACK_BAR_EN
#define YUV_OUTPUT_SELECT
#define RGB_OUTPUT_SELECT

/* Bit masks for DAC output levels */
#define DAC_OUTPUT_LEVEL_MASK

/* Bit masks for soft reset register */
#define SOFT_RESET

/* Bit masks for HD Mode Register 1 */
#define OUTPUT_STD_MASK
#define OUTPUT_STD_SHIFT
#define OUTPUT_STD_EIA0_2
#define OUTPUT_STD_EIA0_1
#define OUTPUT_STD_FULL
#define EMBEDDED_SYNC
#define EXTERNAL_SYNC
#define STD_MODE_SHIFT
#define STD_MODE_MASK
#define STD_MODE_720P
#define STD_MODE_720P_25
#define STD_MODE_720P_30
#define STD_MODE_720P_50
#define STD_MODE_1080I
#define STD_MODE_1080I_25fps
#define STD_MODE_1080P_24
#define STD_MODE_1080P_25
#define STD_MODE_1080P_30
#define STD_MODE_525P
#define STD_MODE_625P

/* Bit masks for SD Mode Register 1 */
#define SD_STD_MASK
#define SD_STD_NTSC
#define SD_STD_PAL_BDGHI
#define SD_STD_PAL_M
#define SD_STD_PAL_N
#define SD_LUMA_FLTR_MASK
#define SD_LUMA_FLTR_SHIFT
#define SD_CHROMA_FLTR_MASK
#define SD_CHROMA_FLTR_SHIFT

/* Bit masks for SD Mode Register 2 */
#define SD_PBPR_SSAF_EN
#define SD_PBPR_SSAF_DI
#define SD_DAC_1_DI
#define SD_DAC_2_DI
#define SD_PEDESTAL_EN
#define SD_PEDESTAL_DI
#define SD_SQUARE_PIXEL_EN
#define SD_SQUARE_PIXEL_DI
#define SD_PIXEL_DATA_VALID
#define SD_ACTIVE_EDGE_EN
#define SD_ACTIVE_EDGE_DI

/* Bit masks for HD Mode Register 6 */
#define HD_RGB_INPUT_EN
#define HD_RGB_INPUT_DI
#define HD_PBPR_SYNC_EN
#define HD_PBPR_SYNC_DI
#define HD_DAC_SWAP_EN
#define HD_DAC_SWAP_DI
#define HD_GAMMA_CURVE_A
#define HD_GAMMA_CURVE_B
#define HD_GAMMA_EN
#define HD_GAMMA_DI
#define HD_ADPT_FLTR_MODEB
#define HD_ADPT_FLTR_MODEA
#define HD_ADPT_FLTR_EN
#define HD_ADPT_FLTR_DI

#define ADV7343_BRIGHTNESS_MAX
#define ADV7343_BRIGHTNESS_MIN
#define ADV7343_BRIGHTNESS_DEF
#define ADV7343_HUE_MAX
#define ADV7343_HUE_MIN
#define ADV7343_HUE_DEF
#define ADV7343_GAIN_MAX
#define ADV7343_GAIN_MIN
#define ADV7343_GAIN_DEF

#endif