/* SPDX-License-Identifier: GPL-2.0-only */ /* sm501-regs.h * * Copyright 2006 Simtec Electronics * * Silicon Motion SM501 register definitions */ /* System Configuration area */ /* System config base */ #define SM501_SYS_CONFIG … /* config 1 */ #define SM501_SYSTEM_CONTROL … #define SM501_SYSCTRL_PANEL_TRISTATE … #define SM501_SYSCTRL_MEM_TRISTATE … #define SM501_SYSCTRL_CRT_TRISTATE … #define SM501_SYSCTRL_PCI_SLAVE_BURST_MASK … #define SM501_SYSCTRL_PCI_SLAVE_BURST_1 … #define SM501_SYSCTRL_PCI_SLAVE_BURST_2 … #define SM501_SYSCTRL_PCI_SLAVE_BURST_4 … #define SM501_SYSCTRL_PCI_SLAVE_BURST_8 … #define SM501_SYSCTRL_PCI_CLOCK_RUN_EN … #define SM501_SYSCTRL_PCI_RETRY_DISABLE … #define SM501_SYSCTRL_PCI_SUBSYS_LOCK … #define SM501_SYSCTRL_PCI_BURST_READ_EN … #define SM501_SYSCTRL_2D_ENGINE_STATUS … /* miscellaneous control */ #define SM501_MISC_CONTROL … #define SM501_MISC_BUS_SH … #define SM501_MISC_BUS_PCI … #define SM501_MISC_BUS_XSCALE … #define SM501_MISC_BUS_NEC … #define SM501_MISC_BUS_MASK … #define SM501_MISC_VR_62MB … #define SM501_MISC_CDR_RESET … #define SM501_MISC_USB_LB … #define SM501_MISC_USB_SLAVE … #define SM501_MISC_BL_1 … #define SM501_MISC_MC … #define SM501_MISC_DAC_POWER … #define SM501_MISC_IRQ_INVERT … #define SM501_MISC_SH … #define SM501_MISC_HOLD_EMPTY … #define SM501_MISC_HOLD_8 … #define SM501_MISC_HOLD_16 … #define SM501_MISC_HOLD_24 … #define SM501_MISC_HOLD_32 … #define SM501_MISC_HOLD_MASK … #define SM501_MISC_FREQ_12 … #define SM501_MISC_PNL_24BIT … #define SM501_MISC_8051_LE … #define SM501_GPIO31_0_CONTROL … #define SM501_GPIO63_32_CONTROL … #define SM501_DRAM_CONTROL … /* command list */ #define SM501_ARBTRTN_CONTROL … /* command list */ #define SM501_COMMAND_LIST_STATUS … /* interrupt debug */ #define SM501_RAW_IRQ_STATUS … #define SM501_RAW_IRQ_CLEAR … #define SM501_IRQ_STATUS … #define SM501_IRQ_MASK … #define SM501_DEBUG_CONTROL … /* power management */ #define SM501_POWERMODE_P2X_SRC … #define SM501_POWERMODE_V2X_SRC … #define SM501_POWERMODE_M_SRC … #define SM501_POWERMODE_M1_SRC … #define SM501_CURRENT_GATE … #define SM501_CURRENT_CLOCK … #define SM501_POWER_MODE_0_GATE … #define SM501_POWER_MODE_0_CLOCK … #define SM501_POWER_MODE_1_GATE … #define SM501_POWER_MODE_1_CLOCK … #define SM501_SLEEP_MODE_GATE … #define SM501_POWER_MODE_CONTROL … /* power gates for units within the 501 */ #define SM501_GATE_HOST … #define SM501_GATE_MEMORY … #define SM501_GATE_DISPLAY … #define SM501_GATE_2D_ENGINE … #define SM501_GATE_CSC … #define SM501_GATE_ZVPORT … #define SM501_GATE_GPIO … #define SM501_GATE_UART0 … #define SM501_GATE_UART1 … #define SM501_GATE_SSP … #define SM501_GATE_USB_HOST … #define SM501_GATE_USB_GADGET … #define SM501_GATE_UCONTROLLER … #define SM501_GATE_AC97 … /* panel clock */ #define SM501_CLOCK_P2XCLK … /* crt clock */ #define SM501_CLOCK_V2XCLK … /* main clock */ #define SM501_CLOCK_MCLK … /* SDRAM controller clock */ #define SM501_CLOCK_M1XCLK … /* config 2 */ #define SM501_PCI_MASTER_BASE … #define SM501_ENDIAN_CONTROL … #define SM501_DEVICEID … /* 0x050100A0 */ #define SM501_DEVICEID_SM501 … #define SM501_DEVICEID_IDMASK … #define SM501_DEVICEID_REVMASK … #define SM501_PLLCLOCK_COUNT … #define SM501_MISC_TIMING … #define SM501_CURRENT_SDRAM_CLOCK … #define SM501_PROGRAMMABLE_PLL_CONTROL … /* GPIO base */ #define SM501_GPIO … #define SM501_GPIO_DATA_LOW … #define SM501_GPIO_DATA_HIGH … #define SM501_GPIO_DDR_LOW … #define SM501_GPIO_DDR_HIGH … #define SM501_GPIO_IRQ_SETUP … #define SM501_GPIO_IRQ_STATUS … #define SM501_GPIO_IRQ_RESET … /* I2C controller base */ #define SM501_I2C … #define SM501_I2C_BYTE_COUNT … #define SM501_I2C_CONTROL … #define SM501_I2C_STATUS … #define SM501_I2C_RESET … #define SM501_I2C_SLAVE_ADDRESS … #define SM501_I2C_DATA … /* SSP base */ #define SM501_SSP … /* Uart 0 base */ #define SM501_UART0 … /* Uart 1 base */ #define SM501_UART1 … /* USB host port base */ #define SM501_USB_HOST … /* USB slave/gadget base */ #define SM501_USB_GADGET … /* USB slave/gadget data port base */ #define SM501_USB_GADGET_DATA … /* Display controller/video engine base */ #define SM501_DC … /* common defines for the SM501 address registers */ #define SM501_ADDR_FLIP … #define SM501_ADDR_EXT … #define SM501_ADDR_CS1 … #define SM501_ADDR_MASK … #define SM501_FIFO_MASK … #define SM501_FIFO_1 … #define SM501_FIFO_3 … #define SM501_FIFO_7 … #define SM501_FIFO_11 … /* common registers for panel and the crt */ #define SM501_OFF_DC_H_TOT … #define SM501_OFF_DC_V_TOT … #define SM501_OFF_DC_H_SYNC … #define SM501_OFF_DC_V_SYNC … #define SM501_DC_PANEL_CONTROL … #define SM501_DC_PANEL_CONTROL_FPEN … #define SM501_DC_PANEL_CONTROL_BIAS … #define SM501_DC_PANEL_CONTROL_DATA … #define SM501_DC_PANEL_CONTROL_VDD … #define SM501_DC_PANEL_CONTROL_DP … #define SM501_DC_PANEL_CONTROL_TFT_888 … #define SM501_DC_PANEL_CONTROL_TFT_333 … #define SM501_DC_PANEL_CONTROL_TFT_444 … #define SM501_DC_PANEL_CONTROL_DE … #define SM501_DC_PANEL_CONTROL_LCD_TFT … #define SM501_DC_PANEL_CONTROL_LCD_STN8 … #define SM501_DC_PANEL_CONTROL_LCD_STN12 … #define SM501_DC_PANEL_CONTROL_CP … #define SM501_DC_PANEL_CONTROL_VSP … #define SM501_DC_PANEL_CONTROL_HSP … #define SM501_DC_PANEL_CONTROL_CK … #define SM501_DC_PANEL_CONTROL_TE … #define SM501_DC_PANEL_CONTROL_VPD … #define SM501_DC_PANEL_CONTROL_VP … #define SM501_DC_PANEL_CONTROL_HPD … #define SM501_DC_PANEL_CONTROL_HP … #define SM501_DC_PANEL_CONTROL_GAMMA … #define SM501_DC_PANEL_CONTROL_EN … #define SM501_DC_PANEL_CONTROL_8BPP … #define SM501_DC_PANEL_CONTROL_16BPP … #define SM501_DC_PANEL_CONTROL_32BPP … #define SM501_DC_PANEL_PANNING_CONTROL … #define SM501_DC_PANEL_COLOR_KEY … #define SM501_DC_PANEL_FB_ADDR … #define SM501_DC_PANEL_FB_OFFSET … #define SM501_DC_PANEL_FB_WIDTH … #define SM501_DC_PANEL_FB_HEIGHT … #define SM501_DC_PANEL_TL_LOC … #define SM501_DC_PANEL_BR_LOC … #define SM501_DC_PANEL_H_TOT … #define SM501_DC_PANEL_H_SYNC … #define SM501_DC_PANEL_V_TOT … #define SM501_DC_PANEL_V_SYNC … #define SM501_DC_PANEL_CUR_LINE … #define SM501_DC_VIDEO_CONTROL … #define SM501_DC_VIDEO_FB0_ADDR … #define SM501_DC_VIDEO_FB_WIDTH … #define SM501_DC_VIDEO_FB0_LAST_ADDR … #define SM501_DC_VIDEO_TL_LOC … #define SM501_DC_VIDEO_BR_LOC … #define SM501_DC_VIDEO_SCALE … #define SM501_DC_VIDEO_INIT_SCALE … #define SM501_DC_VIDEO_YUV_CONSTANTS … #define SM501_DC_VIDEO_FB1_ADDR … #define SM501_DC_VIDEO_FB1_LAST_ADDR … #define SM501_DC_VIDEO_ALPHA_CONTROL … #define SM501_DC_VIDEO_ALPHA_FB_ADDR … #define SM501_DC_VIDEO_ALPHA_FB_OFFSET … #define SM501_DC_VIDEO_ALPHA_FB_LAST_ADDR … #define SM501_DC_VIDEO_ALPHA_TL_LOC … #define SM501_DC_VIDEO_ALPHA_BR_LOC … #define SM501_DC_VIDEO_ALPHA_SCALE … #define SM501_DC_VIDEO_ALPHA_INIT_SCALE … #define SM501_DC_VIDEO_ALPHA_CHROMA_KEY … #define SM501_DC_VIDEO_ALPHA_COLOR_LOOKUP … #define SM501_DC_PANEL_HWC_BASE … #define SM501_DC_PANEL_HWC_ADDR … #define SM501_DC_PANEL_HWC_LOC … #define SM501_DC_PANEL_HWC_COLOR_1_2 … #define SM501_DC_PANEL_HWC_COLOR_3 … #define SM501_HWC_EN … #define SM501_OFF_HWC_ADDR … #define SM501_OFF_HWC_LOC … #define SM501_OFF_HWC_COLOR_1_2 … #define SM501_OFF_HWC_COLOR_3 … #define SM501_DC_ALPHA_CONTROL … #define SM501_DC_ALPHA_FB_ADDR … #define SM501_DC_ALPHA_FB_OFFSET … #define SM501_DC_ALPHA_TL_LOC … #define SM501_DC_ALPHA_BR_LOC … #define SM501_DC_ALPHA_CHROMA_KEY … #define SM501_DC_ALPHA_COLOR_LOOKUP … #define SM501_DC_CRT_CONTROL … #define SM501_DC_CRT_CONTROL_TVP … #define SM501_DC_CRT_CONTROL_CP … #define SM501_DC_CRT_CONTROL_VSP … #define SM501_DC_CRT_CONTROL_HSP … #define SM501_DC_CRT_CONTROL_VS … #define SM501_DC_CRT_CONTROL_BLANK … #define SM501_DC_CRT_CONTROL_SEL … #define SM501_DC_CRT_CONTROL_TE … #define SM501_DC_CRT_CONTROL_PIXEL_MASK … #define SM501_DC_CRT_CONTROL_GAMMA … #define SM501_DC_CRT_CONTROL_ENABLE … #define SM501_DC_CRT_CONTROL_8BPP … #define SM501_DC_CRT_CONTROL_16BPP … #define SM501_DC_CRT_CONTROL_32BPP … #define SM501_DC_CRT_FB_ADDR … #define SM501_DC_CRT_FB_OFFSET … #define SM501_DC_CRT_H_TOT … #define SM501_DC_CRT_H_SYNC … #define SM501_DC_CRT_V_TOT … #define SM501_DC_CRT_V_SYNC … #define SM501_DC_CRT_SIGNATURE_ANALYZER … #define SM501_DC_CRT_CUR_LINE … #define SM501_DC_CRT_MONITOR_DETECT … #define SM501_DC_CRT_HWC_BASE … #define SM501_DC_CRT_HWC_ADDR … #define SM501_DC_CRT_HWC_LOC … #define SM501_DC_CRT_HWC_COLOR_1_2 … #define SM501_DC_CRT_HWC_COLOR_3 … #define SM501_DC_PANEL_PALETTE … #define SM501_DC_VIDEO_PALETTE … #define SM501_DC_CRT_PALETTE … /* Zoom Video port base */ #define SM501_ZVPORT … /* AC97/I2S base */ #define SM501_AC97 … /* 8051 micro controller base */ #define SM501_UCONTROLLER … /* 8051 micro controller SRAM base */ #define SM501_UCONTROLLER_SRAM … /* DMA base */ #define SM501_DMA … /* 2d engine base */ #define SM501_2D_ENGINE … #define SM501_2D_SOURCE … #define SM501_2D_DESTINATION … #define SM501_2D_DIMENSION … #define SM501_2D_CONTROL … #define SM501_2D_PITCH … #define SM501_2D_FOREGROUND … #define SM501_2D_BACKGROUND … #define SM501_2D_STRETCH … #define SM501_2D_COLOR_COMPARE … #define SM501_2D_COLOR_COMPARE_MASK … #define SM501_2D_MASK … #define SM501_2D_CLIP_TL … #define SM501_2D_CLIP_BR … #define SM501_2D_MONO_PATTERN_LOW … #define SM501_2D_MONO_PATTERN_HIGH … #define SM501_2D_WINDOW_WIDTH … #define SM501_2D_SOURCE_BASE … #define SM501_2D_DESTINATION_BASE … #define SM501_2D_ALPHA … #define SM501_2D_WRAP … #define SM501_2D_STATUS … #define SM501_CSC_Y_SOURCE_BASE … #define SM501_CSC_CONSTANTS … #define SM501_CSC_Y_SOURCE_X … #define SM501_CSC_Y_SOURCE_Y … #define SM501_CSC_U_SOURCE_BASE … #define SM501_CSC_V_SOURCE_BASE … #define SM501_CSC_SOURCE_DIMENSION … #define SM501_CSC_SOURCE_PITCH … #define SM501_CSC_DESTINATION … #define SM501_CSC_DESTINATION_DIMENSION … #define SM501_CSC_DESTINATION_PITCH … #define SM501_CSC_SCALE_FACTOR … #define SM501_CSC_DESTINATION_BASE … #define SM501_CSC_CONTROL … /* 2d engine data port base */ #define SM501_2D_ENGINE_DATA …
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