linux/drivers/media/dvb-frontends/drxd_firm.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * drxd_firm.h
 *
 * Copyright (C) 2006-2007 Micronas
 */

#ifndef _DRXD_FIRM_H_
#define _DRXD_FIRM_H_

#include <linux/types.h>
#include "drxd_map_firm.h"

#define VERSION_MAJOR
#define VERSION_MINOR
#define VERSION_PATCH

#define HI_TR_FUNC_ADDR

#define DRXD_MAX_RETRIES
#define HI_I2C_DELAY
#define HI_I2C_BRIDGE_DELAY

#define EQ_TD_TPS_PWR_UNKNOWN
#define EQ_TD_TPS_PWR_QPSK
#define EQ_TD_TPS_PWR_QAM16_ALPHAN
#define EQ_TD_TPS_PWR_QAM16_ALPHA1
#define EQ_TD_TPS_PWR_QAM16_ALPHA2
#define EQ_TD_TPS_PWR_QAM16_ALPHA4
#define EQ_TD_TPS_PWR_QAM64_ALPHAN
#define EQ_TD_TPS_PWR_QAM64_ALPHA1
#define EQ_TD_TPS_PWR_QAM64_ALPHA2
#define EQ_TD_TPS_PWR_QAM64_ALPHA4

#define DRXD_DEF_AG_PWD_CONSUMER
#define DRXD_DEF_AG_PWD_PRO
#define DRXD_DEF_AG_AGC_SIO

#define DRXD_FE_CTRL_MAX

#define DRXD_OSCDEV_DO_SCAN

#define DRXD_OSCDEV_DONT_SCAN

#define DRXD_OSCDEV_STEP

#define DRXD_SCAN_TIMEOUT

#define DRXD_BANDWIDTH_8MHZ_IN_HZ
#define DRXD_BANDWIDTH_7MHZ_IN_HZ
#define DRXD_BANDWIDTH_6MHZ_IN_HZ

#define IRLEN_COARSE_8K
#define IRLEN_FINE_8K
#define IRLEN_COARSE_2K
#define IRLEN_FINE_2K
#define DIFF_INVALID
#define DIFF_TARGET
#define DIFF_MARGIN

extern u8 DRXD_InitAtomicRead[];
extern u8 DRXD_HiI2cPatch_1[];
extern u8 DRXD_HiI2cPatch_3[];

extern u8 DRXD_InitSC[];

extern u8 DRXD_ResetCEFR[];
extern u8 DRXD_InitFEA2_1[];
extern u8 DRXD_InitFEA2_2[];
extern u8 DRXD_InitCPA2[];
extern u8 DRXD_InitCEA2[];
extern u8 DRXD_InitEQA2[];
extern u8 DRXD_InitECA2[];
extern u8 DRXD_ResetECA2[];
extern u8 DRXD_ResetECRAM[];

extern u8 DRXD_A2_microcode[];
extern u32 DRXD_A2_microcode_length;

extern u8 DRXD_InitFEB1_1[];
extern u8 DRXD_InitFEB1_2[];
extern u8 DRXD_InitCPB1[];
extern u8 DRXD_InitCEB1[];
extern u8 DRXD_InitEQB1[];
extern u8 DRXD_InitECB1[];

extern u8 DRXD_InitDiversityFront[];
extern u8 DRXD_InitDiversityEnd[];
extern u8 DRXD_DisableDiversity[];
extern u8 DRXD_StartDiversityFront[];
extern u8 DRXD_StartDiversityEnd[];

extern u8 DRXD_DiversityDelay8MHZ[];
extern u8 DRXD_DiversityDelay6MHZ[];

extern u8 DRXD_B1_microcode[];
extern u32 DRXD_B1_microcode_length;

#endif