/* * Driver for Nuvoton Technology Corporation w83667hg/w83677hg-i CIR * * Copyright (C) 2010 Jarod Wilson <[email protected]> * Copyright (C) 2009 Nuvoton PS Team * * Special thanks to Nuvoton for providing hardware, spec sheets and * sample code upon which portions of this driver are based. Indirect * thanks also to Maxim Levitsky, whose ene_ir driver this driver is * modeled after. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. */ #define pr_fmt(fmt) … #include <linux/kernel.h> #include <linux/module.h> #include <linux/pnp.h> #include <linux/io.h> #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/slab.h> #include <media/rc-core.h> #include <linux/pci_ids.h> #include "nuvoton-cir.h" static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt); static const struct nvt_chip nvt_chips[] = …; static inline struct device *nvt_get_dev(const struct nvt_dev *nvt) { … } static inline bool is_w83667hg(struct nvt_dev *nvt) { … } /* write val to config reg */ static inline void nvt_cr_write(struct nvt_dev *nvt, u8 val, u8 reg) { … } /* read val from config reg */ static inline u8 nvt_cr_read(struct nvt_dev *nvt, u8 reg) { … } /* update config register bit without changing other bits */ static inline void nvt_set_reg_bit(struct nvt_dev *nvt, u8 val, u8 reg) { … } /* enter extended function mode */ static inline int nvt_efm_enable(struct nvt_dev *nvt) { … } /* exit extended function mode */ static inline void nvt_efm_disable(struct nvt_dev *nvt) { … } /* * When you want to address a specific logical device, write its logical * device number to CR_LOGICAL_DEV_SEL, then enable/disable by writing * 0x1/0x0 respectively to CR_LOGICAL_DEV_EN. */ static inline void nvt_select_logical_dev(struct nvt_dev *nvt, u8 ldev) { … } /* select and enable logical device with setting EFM mode*/ static inline void nvt_enable_logical_dev(struct nvt_dev *nvt, u8 ldev) { … } /* select and disable logical device with setting EFM mode*/ static inline void nvt_disable_logical_dev(struct nvt_dev *nvt, u8 ldev) { … } /* write val to cir config register */ static inline void nvt_cir_reg_write(struct nvt_dev *nvt, u8 val, u8 offset) { … } /* read val from cir config register */ static u8 nvt_cir_reg_read(struct nvt_dev *nvt, u8 offset) { … } /* write val to cir wake register */ static inline void nvt_cir_wake_reg_write(struct nvt_dev *nvt, u8 val, u8 offset) { … } /* read val from cir wake config register */ static u8 nvt_cir_wake_reg_read(struct nvt_dev *nvt, u8 offset) { … } /* don't override io address if one is set already */ static void nvt_set_ioaddr(struct nvt_dev *nvt, unsigned long *ioaddr) { … } static void nvt_write_wakeup_codes(struct rc_dev *dev, const u8 *wbuf, int count) { … } static ssize_t wakeup_data_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t wakeup_data_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { … } static DEVICE_ATTR_RW(wakeup_data); /* dump current cir register contents */ static void cir_dump_regs(struct nvt_dev *nvt) { … } /* dump current cir wake register contents */ static void cir_wake_dump_regs(struct nvt_dev *nvt) { … } static inline const char *nvt_find_chip(struct nvt_dev *nvt, int id) { … } /* detect hardware features */ static int nvt_hw_detect(struct nvt_dev *nvt) { … } static void nvt_cir_ldev_init(struct nvt_dev *nvt) { … } static void nvt_cir_wake_ldev_init(struct nvt_dev *nvt) { … } /* clear out the hardware's cir rx fifo */ static void nvt_clear_cir_fifo(struct nvt_dev *nvt) { … } /* clear out the hardware's cir wake rx fifo */ static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt) { … } /* clear out the hardware's cir tx fifo */ static void nvt_clear_tx_fifo(struct nvt_dev *nvt) { … } /* enable RX Trigger Level Reach and Packet End interrupts */ static void nvt_set_cir_iren(struct nvt_dev *nvt) { … } static void nvt_cir_regs_init(struct nvt_dev *nvt) { … } static void nvt_cir_wake_regs_init(struct nvt_dev *nvt) { … } static void nvt_enable_wake(struct nvt_dev *nvt) { … } #if 0 /* Currently unused */ /* rx carrier detect only works in learning mode, must be called w/lock */ static u32 nvt_rx_carrier_detect(struct nvt_dev *nvt) { u32 count, carrier, duration = 0; int i; count = nvt_cir_reg_read(nvt, CIR_FCCL) | nvt_cir_reg_read(nvt, CIR_FCCH) << 8; for (i = 0; i < nvt->pkts; i++) { if (nvt->buf[i] & BUF_PULSE_BIT) duration += nvt->buf[i] & BUF_LEN_MASK; } duration *= SAMPLE_PERIOD; if (!count || !duration) { dev_notice(nvt_get_dev(nvt), "Unable to determine carrier! (c:%u, d:%u)", count, duration); return 0; } carrier = MS_TO_NS(count) / duration; if ((carrier > MAX_CARRIER) || (carrier < MIN_CARRIER)) nvt_dbg("WTF? Carrier frequency out of range!"); nvt_dbg("Carrier frequency: %u (count %u, duration %u)", carrier, count, duration); return carrier; } #endif static int nvt_ir_raw_set_wakeup_filter(struct rc_dev *dev, struct rc_scancode_filter *sc_filter) { … } /* dump contents of the last rx buffer we got from the hw rx fifo */ static void nvt_dump_rx_buf(struct nvt_dev *nvt) { … } /* * Process raw data in rx driver buffer, store it in raw IR event kfifo, * trigger decode when appropriate. * * We get IR data samples one byte at a time. If the msb is set, its a pulse, * otherwise its a space. The lower 7 bits are the count of SAMPLE_PERIOD * (default 50us) intervals for that pulse/space. A discrete signal is * followed by a series of 0x7f packets, then either 0x7<something> or 0x80 * to signal more IR coming (repeats) or end of IR, respectively. We store * sample data in the raw event kfifo until we see 0x7<something> (except f) * or 0x80, at which time, we trigger a decode operation. */ static void nvt_process_rx_ir_data(struct nvt_dev *nvt) { … } static void nvt_handle_rx_fifo_overrun(struct nvt_dev *nvt) { … } /* copy data from hardware rx fifo into driver buffer */ static void nvt_get_rx_ir_data(struct nvt_dev *nvt) { … } static void nvt_cir_log_irqs(u8 status, u8 iren) { … } /* interrupt service routine for incoming and outgoing CIR data */ static irqreturn_t nvt_cir_isr(int irq, void *data) { … } static void nvt_enable_cir(struct nvt_dev *nvt) { … } static void nvt_disable_cir(struct nvt_dev *nvt) { … } static int nvt_open(struct rc_dev *dev) { … } static void nvt_close(struct rc_dev *dev) { … } /* Allocate memory, probe hardware, and initialize everything */ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id) { … } static void nvt_remove(struct pnp_dev *pdev) { … } static int nvt_suspend(struct pnp_dev *pdev, pm_message_t state) { … } static int nvt_resume(struct pnp_dev *pdev) { … } static void nvt_shutdown(struct pnp_dev *pdev) { … } static const struct pnp_device_id nvt_ids[] = …; static struct pnp_driver nvt_driver = …; module_param(debug, int, S_IRUGO | S_IWUSR); MODULE_PARM_DESC(…) …; MODULE_DEVICE_TABLE(pnp, nvt_ids); MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; module_pnp_driver(…);
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