// SPDX-License-Identifier: GPL-2.0 /* * Driver for the Chrontel CH7322 CEC Controller * * Copyright 2020 Google LLC. */ /* * Notes * * - This device powers on in Auto Mode which has limited functionality. This * driver disables Auto Mode when it attaches. * */ #include <linux/cec.h> #include <linux/dmi.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/mutex.h> #include <linux/pci.h> #include <linux/regmap.h> #include <media/cec.h> #include <media/cec-notifier.h> #define CH7322_WRITE … #define CH7322_WRITE_MSENT … #define CH7322_WRITE_BOK … #define CH7322_WRITE_NMASK … /* Write buffer is 0x01-0x10 */ #define CH7322_WRBUF … #define CH7322_WRBUF_LEN … #define CH7322_READ … #define CH7322_READ_NRDT … #define CH7322_READ_MSENT … #define CH7322_READ_NMASK … /* Read buffer is 0x41-0x50 */ #define CH7322_RDBUF … #define CH7322_RDBUF_LEN … #define CH7322_MODE … #define CH7322_MODE_AUTO … #define CH7322_MODE_SW … #define CH7322_RESET … #define CH7322_RESET_RST … #define CH7322_POWER … #define CH7322_POWER_FPD … #define CH7322_CFG0 … #define CH7322_CFG0_EOBEN … #define CH7322_CFG0_PEOB … #define CH7322_CFG0_CLRSPP … #define CH7322_CFG0_FLOW … #define CH7322_CFG1 … #define CH7322_CFG1_STDBYO … #define CH7322_CFG1_HPBP … #define CH7322_CFG1_PIO … #define CH7322_INTCTL … #define CH7322_INTCTL_INTPB … #define CH7322_INTCTL_STDBY … #define CH7322_INTCTL_HPDFALL … #define CH7322_INTCTL_HPDRISE … #define CH7322_INTCTL_RXMSG … #define CH7322_INTCTL_TXMSG … #define CH7322_INTCTL_NEWPHA … #define CH7322_INTCTL_ERROR … #define CH7322_DVCLKFNH … #define CH7322_DVCLKFNL … #define CH7322_CTL … #define CH7322_CTL_FSTDBY … #define CH7322_CTL_PLSEN … #define CH7322_CTL_PLSPB … #define CH7322_CTL_SPADL … #define CH7322_CTL_HINIT … #define CH7322_CTL_WPHYA … #define CH7322_CTL_H1T … #define CH7322_CTL_S1T … #define CH7322_PAWH … #define CH7322_PAWL … #define CH7322_ADDLW … #define CH7322_ADDLW_MASK … #define CH7322_ADDLR … #define CH7322_ADDLR_HPD … #define CH7322_ADDLR_MASK … #define CH7322_INTDATA … #define CH7322_INTDATA_MODE … #define CH7322_INTDATA_STDBY … #define CH7322_INTDATA_HPDFALL … #define CH7322_INTDATA_HPDRISE … #define CH7322_INTDATA_RXMSG … #define CH7322_INTDATA_TXMSG … #define CH7322_INTDATA_NEWPHA … #define CH7322_INTDATA_ERROR … #define CH7322_EVENT … #define CH7322_EVENT_TXERR … #define CH7322_EVENT_HRST … #define CH7322_EVENT_HFST … #define CH7322_EVENT_PHACHG … #define CH7322_EVENT_ACTST … #define CH7322_EVENT_PHARDY … #define CH7322_EVENT_BSOK … #define CH7322_EVENT_ERRADCF … #define CH7322_DID … #define CH7322_DID_CH7322 … #define CH7322_DID_CH7323 … #define CH7322_REVISIONID … #define CH7322_PARH … #define CH7322_PARL … #define CH7322_IOCFG2 … #define CH7322_IOCFG_CIO … #define CH7322_IOCFG_IOCFGMASK … #define CH7322_IOCFG_AUDIO … #define CH7322_IOCFG_SPAMST … #define CH7322_IOCFG_SPAMSP … #define CH7322_CTL3 … #define CH7322_CTL3_SWENA … #define CH7322_CTL3_FC_INIT … #define CH7322_CTL3_SML_FL … #define CH7322_CTL3_SM_RDST … #define CH7322_CTL3_SPP_CIAH … #define CH7322_CTL3_SPP_CIAL … #define CH7322_CTL3_SPP_ACTH … #define CH7322_CTL3_SPP_ACTL … /* BOK status means NACK */ #define CH7322_TX_FLAG_NACK … /* Device will retry automatically */ #define CH7322_TX_FLAG_RETRY … struct ch7322 { … }; static const struct regmap_config ch7322_regmap = …; static int ch7322_send_message(struct ch7322 *ch7322, const struct cec_msg *msg) { … } static int ch7322_receive_message(struct ch7322 *ch7322, struct cec_msg *msg) { … } static void ch7322_tx_done(struct ch7322 *ch7322) { … } static void ch7322_rx_done(struct ch7322 *ch7322) { … } /* * This device can either monitor the DDC lines to obtain the physical address * or it can allow the host to program it. This driver lets the device obtain * it. */ static void ch7322_phys_addr(struct ch7322 *ch7322) { … } static irqreturn_t ch7322_irq(int irq, void *dev) { … } /* This device is always enabled */ static int ch7322_cec_adap_enable(struct cec_adapter *adap, bool enable) { … } static int ch7322_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr) { … } static int ch7322_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, u32 signal_free_time, struct cec_msg *msg) { … } static const struct cec_adap_ops ch7322_cec_adap_ops = …; #if IS_ENABLED(CONFIG_PCI) && IS_ENABLED(CONFIG_DMI) struct ch7322_conn_match { … }; static struct ch7322_conn_match google_endeavour[] = …; static const struct dmi_system_id ch7322_dmi_table[] = …; /* Make a best-effort attempt to locate a matching HDMI port */ static int ch7322_get_port(struct i2c_client *client, struct device **dev, const char **port) { … } #else static int ch7322_get_port(struct i2c_client *client, struct device **dev, const char **port) { *dev = NULL; *port = NULL; return 0; } #endif static int ch7322_probe(struct i2c_client *client) { … } static void ch7322_remove(struct i2c_client *client) { … } static const struct of_device_id ch7322_of_match[] = …; MODULE_DEVICE_TABLE(of, ch7322_of_match); static struct i2c_driver ch7322_i2c_driver = …; module_i2c_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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