#ifndef _SUN8I_A83T_DPHY_H_
#define _SUN8I_A83T_DPHY_H_
#include "sun8i_a83t_mipi_csi2.h"
#define SUN8I_A83T_DPHY_CTRL_REG …
#define SUN8I_A83T_DPHY_CTRL_INIT_VALUE …
#define SUN8I_A83T_DPHY_CTRL_RESET_N …
#define SUN8I_A83T_DPHY_CTRL_SHUTDOWN_N …
#define SUN8I_A83T_DPHY_CTRL_DEBUG …
#define SUN8I_A83T_DPHY_STATUS_REG …
#define SUN8I_A83T_DPHY_STATUS_CLK_STOP …
#define SUN8I_A83T_DPHY_STATUS_CLK_ULPS …
#define SUN8I_A83T_DPHY_STATUS_HSCLK …
#define SUN8I_A83T_DPHY_STATUS_D3_STOP …
#define SUN8I_A83T_DPHY_STATUS_D2_STOP …
#define SUN8I_A83T_DPHY_STATUS_D1_STOP …
#define SUN8I_A83T_DPHY_STATUS_D0_STOP …
#define SUN8I_A83T_DPHY_STATUS_D3_ULPS …
#define SUN8I_A83T_DPHY_STATUS_D2_ULPS …
#define SUN8I_A83T_DPHY_STATUS_D1_ULPS …
#define SUN8I_A83T_DPHY_STATUS_D0_ULPS …
#define SUN8I_A83T_DPHY_ANA0_REG …
#define SUN8I_A83T_DPHY_ANA0_REXT_EN …
#define SUN8I_A83T_DPHY_ANA0_REXT …
#define SUN8I_A83T_DPHY_ANA0_RINT(v) …
#define SUN8I_A83T_DPHY_ANA0_SNK(v) …
int sun8i_a83t_dphy_register(struct sun8i_a83t_mipi_csi2_device *csi2_dev);
#endif