/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2013 Texas Instruments Inc. * * David Griego, <[email protected]> * Dale Farnsworth, <[email protected]> * Archit Taneja, <[email protected]> */ #ifndef _TI_VPDMA_PRIV_H_ #define _TI_VPDMA_PRIV_H_ /* * VPDMA Register offsets */ /* Top level */ #define VPDMA_PID … #define VPDMA_LIST_ADDR … #define VPDMA_LIST_ATTR … #define VPDMA_LIST_STAT_SYNC … #define VPDMA_BG_RGB … #define VPDMA_BG_YUV … #define VPDMA_SETUP … #define VPDMA_MAX_SIZE1 … #define VPDMA_MAX_SIZE2 … #define VPDMA_MAX_SIZE3 … #define VPDMA_MAX_SIZE_WIDTH_MASK … #define VPDMA_MAX_SIZE_WIDTH_SHFT … #define VPDMA_MAX_SIZE_HEIGHT_MASK … #define VPDMA_MAX_SIZE_HEIGHT_SHFT … /* Interrupts */ #define VPDMA_INT_CHAN_STAT(grp) … #define VPDMA_INT_CHAN_MASK(grp) … #define VPDMA_INT_CLIENT0_STAT … #define VPDMA_INT_CLIENT0_MASK … #define VPDMA_INT_CLIENT1_STAT … #define VPDMA_INT_CLIENT1_MASK … #define VPDMA_INT_LIST0_STAT … #define VPDMA_INT_LIST0_MASK … #define VPDMA_INTX_OFFSET … #define VPDMA_PERFMON(i) … /* VIP/VPE client registers */ #define VPDMA_DEI_CHROMA1_CSTAT … #define VPDMA_DEI_LUMA1_CSTAT … #define VPDMA_DEI_LUMA2_CSTAT … #define VPDMA_DEI_CHROMA2_CSTAT … #define VPDMA_DEI_LUMA3_CSTAT … #define VPDMA_DEI_CHROMA3_CSTAT … #define VPDMA_DEI_MV_IN_CSTAT … #define VPDMA_DEI_MV_OUT_CSTAT … #define VPDMA_VIP_LO_Y_CSTAT … #define VPDMA_VIP_LO_UV_CSTAT … #define VPDMA_VIP_UP_Y_CSTAT … #define VPDMA_VIP_UP_UV_CSTAT … #define VPDMA_VPI_CTL_CSTAT … /* Reg field info for VPDMA_CLIENT_CSTAT registers */ #define VPDMA_CSTAT_LINE_MODE_MASK … #define VPDMA_CSTAT_LINE_MODE_SHIFT … #define VPDMA_CSTAT_FRAME_START_MASK … #define VPDMA_CSTAT_FRAME_START_SHIFT … #define VPDMA_LIST_NUM_MASK … #define VPDMA_LIST_NUM_SHFT … #define VPDMA_LIST_STOP_SHFT … #define VPDMA_LIST_RDY_MASK … #define VPDMA_LIST_RDY_SHFT … #define VPDMA_LIST_TYPE_MASK … #define VPDMA_LIST_TYPE_SHFT … #define VPDMA_LIST_SIZE_MASK … /* * The YUV data type definition below are taken from * both the TRM and i839 Errata information. * Use the correct data type considering byte * reordering of components. * * Also since the single use of "C" in the 422 case * to mean "Cr" (i.e. V component). It was decided * to explicitly label them CR to remove any confusion. * Bear in mind that the type label refer to the memory * packed order (LSB - MSB). */ #define DATA_TYPE_Y444 … #define DATA_TYPE_Y422 … #define DATA_TYPE_Y420 … #define DATA_TYPE_C444 … #define DATA_TYPE_C422 … #define DATA_TYPE_C420 … #define DATA_TYPE_CB420 … #define DATA_TYPE_YC444 … #define DATA_TYPE_YCB422 … #define DATA_TYPE_YCR422 … #define DATA_TYPE_CBY422 … #define DATA_TYPE_CRY422 … /* * The RGB data type definition below are defined * to follow Errata i819. * The initial values were taken from: * VPDMA_data_type_mapping_v0.2vayu_c.pdf * But some of the ARGB definition appeared to be wrong * in the document also. As they would yield RGBA instead. * They have been corrected based on experimentation. */ #define DATA_TYPE_RGB16_565 … #define DATA_TYPE_ARGB_1555 … #define DATA_TYPE_ARGB_4444 … #define DATA_TYPE_RGBA_5551 … #define DATA_TYPE_RGBA_4444 … #define DATA_TYPE_ARGB24_6666 … #define DATA_TYPE_RGB24_888 … #define DATA_TYPE_ARGB32_8888 … #define DATA_TYPE_RGBA24_6666 … #define DATA_TYPE_RGBA32_8888 … #define DATA_TYPE_BGR16_565 … #define DATA_TYPE_ABGR_1555 … #define DATA_TYPE_ABGR_4444 … #define DATA_TYPE_BGRA_5551 … #define DATA_TYPE_BGRA_4444 … #define DATA_TYPE_ABGR24_6666 … #define DATA_TYPE_BGR24_888 … #define DATA_TYPE_ABGR32_8888 … #define DATA_TYPE_BGRA24_6666 … #define DATA_TYPE_BGRA32_8888 … #define DATA_TYPE_MV … /* VPDMA channel numbers, some are common between VIP/VPE and appear twice */ #define VPE_CHAN_NUM_LUMA1_IN … #define VPE_CHAN_NUM_CHROMA1_IN … #define VPE_CHAN_NUM_LUMA2_IN … #define VPE_CHAN_NUM_CHROMA2_IN … #define VPE_CHAN_NUM_LUMA3_IN … #define VPE_CHAN_NUM_CHROMA3_IN … #define VPE_CHAN_NUM_MV_IN … #define VPE_CHAN_NUM_MV_OUT … #define VIP1_CHAN_NUM_MULT_PORT_A_SRC0 … #define VIP1_CHAN_NUM_MULT_ANC_A_SRC0 … #define VPE_CHAN_NUM_LUMA_OUT … #define VPE_CHAN_NUM_CHROMA_OUT … #define VIP1_CHAN_NUM_PORT_A_LUMA … #define VIP1_CHAN_NUM_PORT_A_CHROMA … #define VPE_CHAN_NUM_RGB_OUT … #define VIP1_CHAN_NUM_PORT_A_RGB … #define VIP1_CHAN_NUM_PORT_B_RGB … /* * a VPDMA address data block payload for a configuration descriptor needs to * have each sub block length as a multiple of 16 bytes. Therefore, the overall * size of the payload also needs to be a multiple of 16 bytes. The sub block * lengths should be ensured to be aligned by the VPDMA user. */ #define VPDMA_ADB_SIZE_ALIGN … /* * data transfer descriptor */ struct vpdma_dtd { … }; /* Data Transfer Descriptor specifics */ #define DTD_NO_NOTIFY … #define DTD_NOTIFY … #define DTD_PKT_TYPE … #define DTD_DIR_IN … #define DTD_DIR_OUT … /* type_ctl_stride */ #define DTD_DATA_TYPE_MASK … #define DTD_DATA_TYPE_SHFT … #define DTD_NOTIFY_MASK … #define DTD_NOTIFY_SHFT … #define DTD_FIELD_MASK … #define DTD_FIELD_SHFT … #define DTD_1D_MASK … #define DTD_1D_SHFT … #define DTD_EVEN_LINE_SKIP_MASK … #define DTD_EVEN_LINE_SKIP_SHFT … #define DTD_ODD_LINE_SKIP_MASK … #define DTD_ODD_LINE_SKIP_SHFT … #define DTD_LINE_STRIDE_MASK … #define DTD_LINE_STRIDE_SHFT … /* xfer_length_height */ #define DTD_LINE_LENGTH_MASK … #define DTD_LINE_LENGTH_SHFT … #define DTD_XFER_HEIGHT_MASK … #define DTD_XFER_HEIGHT_SHFT … /* pkt_ctl */ #define DTD_PKT_TYPE_MASK … #define DTD_PKT_TYPE_SHFT … #define DTD_MODE_MASK … #define DTD_MODE_SHFT … #define DTD_DIR_MASK … #define DTD_DIR_SHFT … #define DTD_CHAN_MASK … #define DTD_CHAN_SHFT … #define DTD_PRI_MASK … #define DTD_PRI_SHFT … #define DTD_NEXT_CHAN_MASK … #define DTD_NEXT_CHAN_SHFT … /* frame_width_height */ #define DTD_FRAME_WIDTH_MASK … #define DTD_FRAME_WIDTH_SHFT … #define DTD_FRAME_HEIGHT_MASK … #define DTD_FRAME_HEIGHT_SHFT … /* start_h_v */ #define DTD_H_START_MASK … #define DTD_H_START_SHFT … #define DTD_V_START_MASK … #define DTD_V_START_SHFT … #define DTD_DESC_START_MASK … #define DTD_DESC_START_SHIFT … #define DTD_WRITE_DESC_MASK … #define DTD_WRITE_DESC_SHIFT … #define DTD_DROP_DATA_MASK … #define DTD_DROP_DATA_SHIFT … #define DTD_USE_DESC_MASK … #define DTD_USE_DESC_SHIFT … /* max_width_height */ #define DTD_MAX_WIDTH_MASK … #define DTD_MAX_WIDTH_SHFT … #define DTD_MAX_HEIGHT_MASK … #define DTD_MAX_HEIGHT_SHFT … static inline u32 dtd_type_ctl_stride(int type, bool notify, int field, bool one_d, bool even_line_skip, bool odd_line_skip, int line_stride) { … } static inline u32 dtd_xfer_length_height(int line_length, int xfer_height) { … } static inline u32 dtd_pkt_ctl(bool mode, bool dir, int chan, int pri, int next_chan) { … } static inline u32 dtd_frame_width_height(int width, int height) { … } static inline u32 dtd_desc_write_addr(unsigned int addr, bool write_desc, bool drop_data, bool use_desc) { … } static inline u32 dtd_start_h_v(int h_start, int v_start) { … } static inline u32 dtd_max_width_height(int max_width, int max_height) { … } static inline int dtd_get_data_type(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_notify(struct vpdma_dtd *dtd) { … } static inline int dtd_get_field(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_1d(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_even_line_skip(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_odd_line_skip(struct vpdma_dtd *dtd) { … } static inline int dtd_get_line_stride(struct vpdma_dtd *dtd) { … } static inline int dtd_get_line_length(struct vpdma_dtd *dtd) { … } static inline int dtd_get_xfer_height(struct vpdma_dtd *dtd) { … } static inline int dtd_get_pkt_type(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_mode(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_dir(struct vpdma_dtd *dtd) { … } static inline int dtd_get_chan(struct vpdma_dtd *dtd) { … } static inline int dtd_get_priority(struct vpdma_dtd *dtd) { … } static inline int dtd_get_next_chan(struct vpdma_dtd *dtd) { … } static inline int dtd_get_frame_width(struct vpdma_dtd *dtd) { … } static inline int dtd_get_frame_height(struct vpdma_dtd *dtd) { … } static inline int dtd_get_desc_write_addr(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_write_desc(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_drop_data(struct vpdma_dtd *dtd) { … } static inline bool dtd_get_use_desc(struct vpdma_dtd *dtd) { … } static inline int dtd_get_h_start(struct vpdma_dtd *dtd) { … } static inline int dtd_get_v_start(struct vpdma_dtd *dtd) { … } static inline int dtd_get_max_width(struct vpdma_dtd *dtd) { … } static inline int dtd_get_max_height(struct vpdma_dtd *dtd) { … } /* * configuration descriptor */ struct vpdma_cfd { … }; /* Configuration descriptor specifics */ #define CFD_PKT_TYPE … #define CFD_DIRECT … #define CFD_INDIRECT … #define CFD_CLS_ADB … #define CFD_CLS_BLOCK … /* block_len */ #define CFD__BLOCK_LEN_MASK … #define CFD__BLOCK_LEN_SHFT … /* ctl_payload_len */ #define CFD_PKT_TYPE_MASK … #define CFD_PKT_TYPE_SHFT … #define CFD_DIRECT_MASK … #define CFD_DIRECT_SHFT … #define CFD_CLASS_MASK … #define CFD_CLASS_SHFT … #define CFD_DEST_MASK … #define CFD_DEST_SHFT … #define CFD_PAYLOAD_LEN_MASK … #define CFD_PAYLOAD_LEN_SHFT … static inline u32 cfd_pkt_payload_len(bool direct, int cls, int dest, int payload_len) { … } static inline int cfd_get_pkt_type(struct vpdma_cfd *cfd) { … } static inline bool cfd_get_direct(struct vpdma_cfd *cfd) { … } static inline bool cfd_get_class(struct vpdma_cfd *cfd) { … } static inline int cfd_get_dest(struct vpdma_cfd *cfd) { … } static inline int cfd_get_payload_len(struct vpdma_cfd *cfd) { … } /* * control descriptor */ struct vpdma_ctd { … }; /* control descriptor types */ #define CTD_TYPE_SYNC_ON_CLIENT … #define CTD_TYPE_SYNC_ON_LIST … #define CTD_TYPE_SYNC_ON_EXT … #define CTD_TYPE_SYNC_ON_LM_TIMER … #define CTD_TYPE_SYNC_ON_CHANNEL … #define CTD_TYPE_CHNG_CLIENT_IRQ … #define CTD_TYPE_SEND_IRQ … #define CTD_TYPE_RELOAD_LIST … #define CTD_TYPE_ABORT_CHANNEL … #define CTD_PKT_TYPE … /* timer_value */ #define CTD_TIMER_VALUE_MASK … #define CTD_TIMER_VALUE_SHFT … /* pixel_line_count */ #define CTD_PIXEL_COUNT_MASK … #define CTD_PIXEL_COUNT_SHFT … #define CTD_LINE_COUNT_MASK … #define CTD_LINE_COUNT_SHFT … /* list_size */ #define CTD_LIST_SIZE_MASK … #define CTD_LIST_SIZE_SHFT … /* event */ #define CTD_EVENT_MASK … #define CTD_EVENT_SHFT … /* fid_ctl */ #define CTD_FID2_MASK … #define CTD_FID2_SHFT … #define CTD_FID1_MASK … #define CTD_FID1_SHFT … #define CTD_FID0_MASK … #define CTD_FID0_SHFT … /* type_source_ctl */ #define CTD_PKT_TYPE_MASK … #define CTD_PKT_TYPE_SHFT … #define CTD_SOURCE_MASK … #define CTD_SOURCE_SHFT … #define CTD_CONTROL_MASK … #define CTD_CONTROL_SHFT … static inline u32 ctd_pixel_line_count(int pixel_count, int line_count) { … } static inline u32 ctd_set_fid_ctl(int fid0, int fid1, int fid2) { … } static inline u32 ctd_type_source_ctl(int source, int control) { … } static inline u32 ctd_get_pixel_count(struct vpdma_ctd *ctd) { … } static inline int ctd_get_line_count(struct vpdma_ctd *ctd) { … } static inline int ctd_get_event(struct vpdma_ctd *ctd) { … } static inline int ctd_get_fid2_ctl(struct vpdma_ctd *ctd) { … } static inline int ctd_get_fid1_ctl(struct vpdma_ctd *ctd) { … } static inline int ctd_get_fid0_ctl(struct vpdma_ctd *ctd) { … } static inline int ctd_get_pkt_type(struct vpdma_ctd *ctd) { … } static inline int ctd_get_source(struct vpdma_ctd *ctd) { … } static inline int ctd_get_ctl(struct vpdma_ctd *ctd) { … } #endif
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