linux/drivers/media/platform/ti/am437x/am437x-vpfe_regs.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * TI AM437x Image Sensor Interface Registers
 *
 * Copyright (C) 2013 - 2014 Texas Instruments, Inc.
 *
 * Benoit Parrot <[email protected]>
 * Lad, Prabhakar <[email protected]>
 */

#ifndef AM437X_VPFE_REGS_H
#define AM437X_VPFE_REGS_H

/* VPFE module register offset */
#define VPFE_REVISION
#define VPFE_PCR
#define VPFE_SYNMODE
#define VPFE_HD_VD_WID
#define VPFE_PIX_LINES
#define VPFE_HORZ_INFO
#define VPFE_VERT_START
#define VPFE_VERT_LINES
#define VPFE_CULLING
#define VPFE_HSIZE_OFF
#define VPFE_SDOFST
#define VPFE_SDR_ADDR
#define VPFE_CLAMP
#define VPFE_DCSUB
#define VPFE_COLPTN
#define VPFE_BLKCMP
#define VPFE_VDINT
#define VPFE_ALAW
#define VPFE_REC656IF
#define VPFE_CCDCFG
#define VPFE_DMA_CNTL
#define VPFE_SYSCONFIG
#define VPFE_CONFIG
#define VPFE_IRQ_EOI
#define VPFE_IRQ_STS_RAW
#define VPFE_IRQ_STS
#define VPFE_IRQ_EN_SET
#define VPFE_IRQ_EN_CLR
#define VPFE_REG_END

/* Define bit fields within selected registers */
#define VPFE_FID_POL_MASK
#define VPFE_FID_POL_SHIFT
#define VPFE_HD_POL_MASK
#define VPFE_HD_POL_SHIFT
#define VPFE_VD_POL_MASK
#define VPFE_VD_POL_SHIFT
#define VPFE_HSIZE_OFF_MASK
#define VPFE_32BYTE_ALIGN_VAL
#define VPFE_FRM_FMT_MASK
#define VPFE_FRM_FMT_SHIFT
#define VPFE_DATA_SZ_MASK
#define VPFE_DATA_SZ_SHIFT
#define VPFE_PIX_FMT_MASK
#define VPFE_PIX_FMT_SHIFT
#define VPFE_VP2SDR_DISABLE
#define VPFE_WEN_ENABLE
#define VPFE_SDR2RSZ_DISABLE
#define VPFE_VDHDEN_ENABLE
#define VPFE_LPF_ENABLE
#define VPFE_ALAW_ENABLE
#define VPFE_ALAW_GAMMA_WD_MASK
#define VPFE_BLK_CLAMP_ENABLE
#define VPFE_BLK_SGAIN_MASK
#define VPFE_BLK_ST_PXL_MASK
#define VPFE_BLK_ST_PXL_SHIFT
#define VPFE_BLK_SAMPLE_LN_MASK
#define VPFE_BLK_SAMPLE_LN_SHIFT
#define VPFE_BLK_SAMPLE_LINE_MASK
#define VPFE_BLK_SAMPLE_LINE_SHIFT
#define VPFE_BLK_DC_SUB_MASK
#define VPFE_BLK_COMP_MASK
#define VPFE_BLK_COMP_GB_COMP_SHIFT
#define VPFE_BLK_COMP_GR_COMP_SHIFT
#define VPFE_BLK_COMP_R_COMP_SHIFT
#define VPFE_LATCH_ON_VSYNC_DISABLE
#define VPFE_DATA_PACK_ENABLE
#define VPFE_HORZ_INFO_SPH_SHIFT
#define VPFE_VERT_START_SLV0_SHIFT
#define VPFE_VDINT_VDINT0_SHIFT
#define VPFE_VDINT_VDINT1_MASK
#define VPFE_PPC_RAW
#define VPFE_DCSUB_DEFAULT_VAL
#define VPFE_CLAMP_DEFAULT_VAL
#define VPFE_COLPTN_VAL
#define VPFE_TWO_BYTES_PER_PIXEL
#define VPFE_INTERLACED_IMAGE_INVERT
#define VPFE_INTERLACED_NO_IMAGE_INVERT
#define VPFE_PROGRESSIVE_IMAGE_INVERT
#define VPFE_PROGRESSIVE_NO_IMAGE_INVERT
#define VPFE_INTERLACED_HEIGHT_SHIFT
#define VPFE_SYN_MODE_INPMOD_SHIFT
#define VPFE_SYN_MODE_INPMOD_MASK
#define VPFE_SYN_MODE_8BITS
#define VPFE_SYN_MODE_10BITS
#define VPFE_SYN_MODE_11BITS
#define VPFE_SYN_MODE_12BITS
#define VPFE_SYN_MODE_13BITS
#define VPFE_SYN_MODE_14BITS
#define VPFE_SYN_MODE_15BITS
#define VPFE_SYN_MODE_16BITS
#define VPFE_SYN_FLDMODE_MASK
#define VPFE_SYN_FLDMODE_SHIFT
#define VPFE_REC656IF_BT656_EN
#define VPFE_SYN_MODE_VD_POL_NEGATIVE
#define VPFE_CCDCFG_Y8POS_SHIFT
#define VPFE_CCDCFG_BW656_10BIT
#define VPFE_SDOFST_FIELD_INTERLEAVED
#define VPFE_NO_CULLING
#define VPFE_VDINT0
#define VPFE_VDINT1
#define VPFE_VDINT2
#define VPFE_DMA_CNTL_OVERFLOW

#define VPFE_CONFIG_PCLK_INV_SHIFT
#define VPFE_CONFIG_PCLK_INV_MASK
#define VPFE_CONFIG_PCLK_INV_NOT_INV
#define VPFE_CONFIG_PCLK_INV_INV
#define VPFE_CONFIG_EN_SHIFT
#define VPFE_CONFIG_EN_MASK
#define VPFE_CONFIG_EN_DISABLE
#define VPFE_CONFIG_EN_ENABLE
#define VPFE_CONFIG_ST_SHIFT
#define VPFE_CONFIG_ST_MASK
#define VPFE_CONFIG_ST_OCP_ACTIVE
#define VPFE_CONFIG_ST_OCP_STANDBY

#endif		/* AM437X_VPFE_REGS_H */