linux/drivers/media/platform/verisilicon/rockchip_vpu2_hw_h264_dec.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Hantro VPU codec driver
 *
 * Copyright (c) 2014 Rockchip Electronics Co., Ltd.
 *	Hertz Wong <[email protected]>
 *	Herman Chen <[email protected]>
 *
 * Copyright (C) 2014 Google, Inc.
 *	Tomasz Figa <[email protected]>
 */

#include <linux/types.h>
#include <linux/sort.h>

#include <media/v4l2-mem2mem.h>

#include "hantro_hw.h"
#include "hantro_v4l2.h"

#define VDPU_SWREG(nr)

#define VDPU_REG_DEC_OUT_BASE
#define VDPU_REG_RLC_VLC_BASE
#define VDPU_REG_QTABLE_BASE
#define VDPU_REG_DIR_MV_BASE
#define VDPU_REG_REFER_BASE(i)
#define VDPU_REG_DEC_E(v)

#define VDPU_REG_DEC_ADV_PRE_DIS(v)
#define VDPU_REG_DEC_SCMD_DIS(v)
#define VDPU_REG_FILTERING_DIS(v)
#define VDPU_REG_PIC_FIXED_QUANT(v)
#define VDPU_REG_DEC_LATENCY(v)

#define VDPU_REG_INIT_QP(v)
#define VDPU_REG_STREAM_LEN(v)

#define VDPU_REG_APF_THRESHOLD(v)
#define VDPU_REG_STARTMB_X(v)
#define VDPU_REG_STARTMB_Y(v)

#define VDPU_REG_DEC_MODE(v)

#define VDPU_REG_DEC_STRENDIAN_E(v)
#define VDPU_REG_DEC_STRSWAP32_E(v)
#define VDPU_REG_DEC_OUTSWAP32_E(v)
#define VDPU_REG_DEC_INSWAP32_E(v)
#define VDPU_REG_DEC_OUT_ENDIAN(v)
#define VDPU_REG_DEC_IN_ENDIAN(v)

#define VDPU_REG_DEC_DATA_DISC_E(v)
#define VDPU_REG_DEC_MAX_BURST(v)
#define VDPU_REG_DEC_AXI_WR_ID(v)
#define VDPU_REG_DEC_AXI_RD_ID(v)

#define VDPU_REG_START_CODE_E(v)
#define VDPU_REG_CH_8PIX_ILEAV_E(v)
#define VDPU_REG_RLC_MODE_E(v)
#define VDPU_REG_PIC_INTERLACE_E(v)
#define VDPU_REG_PIC_FIELDMODE_E(v)
#define VDPU_REG_PIC_TOPFIELD_E(v)
#define VDPU_REG_WRITE_MVS_E(v)
#define VDPU_REG_SEQ_MBAFF_E(v)
#define VDPU_REG_PICORD_COUNT_E(v)
#define VDPU_REG_DEC_TIMEOUT_E(v)
#define VDPU_REG_DEC_CLK_GATE_E(v)

#define VDPU_REG_PRED_BC_TAP_0_0(v)
#define VDPU_REG_PRED_BC_TAP_0_1(v)
#define VDPU_REG_PRED_BC_TAP_0_2(v)

#define VDPU_REG_REFBU_E(v)

#define VDPU_REG_PINIT_RLIST_F9(v)
#define VDPU_REG_PINIT_RLIST_F8(v)
#define VDPU_REG_PINIT_RLIST_F7(v)
#define VDPU_REG_PINIT_RLIST_F6(v)
#define VDPU_REG_PINIT_RLIST_F5(v)
#define VDPU_REG_PINIT_RLIST_F4(v)

#define VDPU_REG_PINIT_RLIST_F15(v)
#define VDPU_REG_PINIT_RLIST_F14(v)
#define VDPU_REG_PINIT_RLIST_F13(v)
#define VDPU_REG_PINIT_RLIST_F12(v)
#define VDPU_REG_PINIT_RLIST_F11(v)
#define VDPU_REG_PINIT_RLIST_F10(v)

#define VDPU_REG_REFER1_NBR(v)
#define VDPU_REG_REFER0_NBR(v)

#define VDPU_REG_REFER3_NBR(v)
#define VDPU_REG_REFER2_NBR(v)

#define VDPU_REG_REFER5_NBR(v)
#define VDPU_REG_REFER4_NBR(v)

#define VDPU_REG_REFER7_NBR(v)
#define VDPU_REG_REFER6_NBR(v)

#define VDPU_REG_REFER9_NBR(v)
#define VDPU_REG_REFER8_NBR(v)

#define VDPU_REG_REFER11_NBR(v)
#define VDPU_REG_REFER10_NBR(v)

#define VDPU_REG_REFER13_NBR(v)
#define VDPU_REG_REFER12_NBR(v)

#define VDPU_REG_REFER15_NBR(v)
#define VDPU_REG_REFER14_NBR(v)

#define VDPU_REG_BINIT_RLIST_F5(v)
#define VDPU_REG_BINIT_RLIST_F4(v)
#define VDPU_REG_BINIT_RLIST_F3(v)
#define VDPU_REG_BINIT_RLIST_F2(v)
#define VDPU_REG_BINIT_RLIST_F1(v)
#define VDPU_REG_BINIT_RLIST_F0(v)

#define VDPU_REG_BINIT_RLIST_F11(v)
#define VDPU_REG_BINIT_RLIST_F10(v)
#define VDPU_REG_BINIT_RLIST_F9(v)
#define VDPU_REG_BINIT_RLIST_F8(v)
#define VDPU_REG_BINIT_RLIST_F7(v)
#define VDPU_REG_BINIT_RLIST_F6(v)

#define VDPU_REG_BINIT_RLIST_F15(v)
#define VDPU_REG_BINIT_RLIST_F14(v)
#define VDPU_REG_BINIT_RLIST_F13(v)
#define VDPU_REG_BINIT_RLIST_F12(v)

#define VDPU_REG_BINIT_RLIST_B5(v)
#define VDPU_REG_BINIT_RLIST_B4(v)
#define VDPU_REG_BINIT_RLIST_B3(v)
#define VDPU_REG_BINIT_RLIST_B2(v)
#define VDPU_REG_BINIT_RLIST_B1(v)
#define VDPU_REG_BINIT_RLIST_B0(v)

#define VDPU_REG_BINIT_RLIST_B11(v)
#define VDPU_REG_BINIT_RLIST_B10(v)
#define VDPU_REG_BINIT_RLIST_B9(v)
#define VDPU_REG_BINIT_RLIST_B8(v)
#define VDPU_REG_BINIT_RLIST_B7(v)
#define VDPU_REG_BINIT_RLIST_B6(v)

#define VDPU_REG_BINIT_RLIST_B15(v)
#define VDPU_REG_BINIT_RLIST_B14(v)
#define VDPU_REG_BINIT_RLIST_B13(v)
#define VDPU_REG_BINIT_RLIST_B12(v)

#define VDPU_REG_PINIT_RLIST_F3(v)
#define VDPU_REG_PINIT_RLIST_F2(v)
#define VDPU_REG_PINIT_RLIST_F1(v)
#define VDPU_REG_PINIT_RLIST_F0(v)

#define VDPU_REG_REFER_LTERM_E(v)

#define VDPU_REG_REFER_VALID_E(v)

#define VDPU_REG_STRM_START_BIT(v)

#define VDPU_REG_CH_QP_OFFSET2(v)
#define VDPU_REG_CH_QP_OFFSET(v)
#define VDPU_REG_PIC_MB_HEIGHT_P(v)
#define VDPU_REG_PIC_MB_WIDTH(v)

#define VDPU_REG_WEIGHT_BIPR_IDC(v)
#define VDPU_REG_REF_FRAMES(v)

#define VDPU_REG_FILT_CTRL_PRES(v)
#define VDPU_REG_RDPIC_CNT_PRES(v)
#define VDPU_REG_FRAMENUM_LEN(v)
#define VDPU_REG_FRAMENUM(v)

#define VDPU_REG_REFPIC_MK_LEN(v)
#define VDPU_REG_IDR_PIC_ID(v)

#define VDPU_REG_PPS_ID(v)
#define VDPU_REG_REFIDX1_ACTIVE(v)
#define VDPU_REG_REFIDX0_ACTIVE(v)
#define VDPU_REG_POC_LENGTH(v)

#define VDPU_REG_IDR_PIC_E(v)
#define VDPU_REG_DIR_8X8_INFER_E(v)
#define VDPU_REG_BLACKWHITE_E(v)
#define VDPU_REG_CABAC_E(v)
#define VDPU_REG_WEIGHT_PRED_E(v)
#define VDPU_REG_CONST_INTRA_E(v)
#define VDPU_REG_8X8TRANS_FLAG_E(v)
#define VDPU_REG_TYPE1_QUANT_E(v)
#define VDPU_REG_FIELDPIC_FLAG_E(v)

static void set_params(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *src_buf)
{}

static void set_ref(struct hantro_ctx *ctx)
{}

static void set_buffers(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *src_buf)
{}

int rockchip_vpu2_h264_dec_run(struct hantro_ctx *ctx)
{}