linux/drivers/media/platform/verisilicon/rockchip_vpu2_hw_mpeg2_dec.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Hantro VPU codec driver
 *
 * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
 */

#include <asm/unaligned.h>
#include <linux/bitfield.h>
#include <media/v4l2-mem2mem.h>
#include "hantro.h"
#include "hantro_hw.h"

#define VDPU_SWREG(nr)

#define VDPU_REG_DEC_OUT_BASE
#define VDPU_REG_RLC_VLC_BASE
#define VDPU_REG_QTABLE_BASE
#define VDPU_REG_REFER0_BASE
#define VDPU_REG_REFER2_BASE
#define VDPU_REG_REFER3_BASE
#define VDPU_REG_REFER1_BASE
#define VDPU_REG_DEC_E(v)

#define VDPU_REG_DEC_ADV_PRE_DIS(v)
#define VDPU_REG_DEC_SCMD_DIS(v)
#define VDPU_REG_FILTERING_DIS(v)
#define VDPU_REG_DEC_LATENCY(v)

#define VDPU_REG_INIT_QP(v)
#define VDPU_REG_STREAM_LEN(v)

#define VDPU_REG_APF_THRESHOLD(v)
#define VDPU_REG_STARTMB_X(v)
#define VDPU_REG_STARTMB_Y(v)

#define VDPU_REG_DEC_MODE(v)

#define VDPU_REG_DEC_STRENDIAN_E(v)
#define VDPU_REG_DEC_STRSWAP32_E(v)
#define VDPU_REG_DEC_OUTSWAP32_E(v)
#define VDPU_REG_DEC_INSWAP32_E(v)
#define VDPU_REG_DEC_OUT_ENDIAN(v)
#define VDPU_REG_DEC_IN_ENDIAN(v)

#define VDPU_REG_DEC_DATA_DISC_E(v)
#define VDPU_REG_DEC_MAX_BURST(v)
#define VDPU_REG_DEC_AXI_WR_ID(v)
#define VDPU_REG_DEC_AXI_RD_ID(v)

#define VDPU_REG_RLC_MODE_E(v)
#define VDPU_REG_PIC_INTERLACE_E(v)
#define VDPU_REG_PIC_FIELDMODE_E(v)
#define VDPU_REG_PIC_B_E(v)
#define VDPU_REG_PIC_INTER_E(v)
#define VDPU_REG_PIC_TOPFIELD_E(v)
#define VDPU_REG_FWD_INTERLACE_E(v)
#define VDPU_REG_WRITE_MVS_E(v)
#define VDPU_REG_DEC_TIMEOUT_E(v)
#define VDPU_REG_DEC_CLK_GATE_E(v)

#define VDPU_REG_PIC_MB_WIDTH(v)
#define VDPU_REG_PIC_MB_HEIGHT_P(v)
#define VDPU_REG_ALT_SCAN_E(v)
#define VDPU_REG_TOPFIELDFIRST_E(v)

#define VDPU_REG_STRM_START_BIT(v)
#define VDPU_REG_QSCALE_TYPE(v)
#define VDPU_REG_CON_MV_E(v)
#define VDPU_REG_INTRA_DC_PREC(v)
#define VDPU_REG_INTRA_VLC_TAB(v)
#define VDPU_REG_FRAME_PRED_DCT(v)

#define VDPU_REG_ALT_SCAN_FLAG_E(v)
#define VDPU_REG_FCODE_FWD_HOR(v)
#define VDPU_REG_FCODE_FWD_VER(v)
#define VDPU_REG_FCODE_BWD_HOR(v)
#define VDPU_REG_FCODE_BWD_VER(v)
#define VDPU_REG_MV_ACCURACY_FWD(v)
#define VDPU_REG_MV_ACCURACY_BWD(v)

static void
rockchip_vpu2_mpeg2_dec_set_quantisation(struct hantro_dev *vpu,
					 struct hantro_ctx *ctx)
{}

static void
rockchip_vpu2_mpeg2_dec_set_buffers(struct hantro_dev *vpu,
				    struct hantro_ctx *ctx,
				    struct vb2_buffer *src_buf,
				    struct vb2_buffer *dst_buf,
				    const struct v4l2_ctrl_mpeg2_sequence *seq,
				    const struct v4l2_ctrl_mpeg2_picture *pic)
{}

int rockchip_vpu2_mpeg2_dec_run(struct hantro_ctx *ctx)
{}