linux/drivers/media/platform/verisilicon/rockchip_vpu_hw.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Hantro VPU codec driver
 *
 * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
 *	Jeffy Chen <[email protected]>
 */

#include <linux/clk.h>

#include "hantro.h"
#include "hantro_jpeg.h"
#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
#include "rockchip_vpu2_regs.h"
#include "rockchip_vpu981_regs.h"

#define RK3066_ACLK_MAX_FREQ …
#define RK3288_ACLK_MAX_FREQ …
#define RK3588_ACLK_MAX_FREQ …

#define ROCKCHIP_VPU981_MIN_SIZE …

/*
 * Supported formats.
 */

static const struct hantro_fmt rockchip_vpu_enc_fmts[] = …;

static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = …;

static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = …;

static const struct hantro_fmt rk3066_vpu_dec_fmts[] = …;

static const struct hantro_fmt rk3288_vpu_dec_fmts[] = …;

static const struct hantro_fmt rockchip_vdpu2_dec_fmts[] = …;

static const struct hantro_fmt rk3399_vpu_dec_fmts[] = …;

static const struct hantro_fmt rockchip_vpu981_dec_fmts[] = …;

static irqreturn_t rockchip_vpu1_vepu_irq(int irq, void *dev_id)
{ … }

static irqreturn_t rockchip_vpu2_vdpu_irq(int irq, void *dev_id)
{ … }

static irqreturn_t rockchip_vpu2_vepu_irq(int irq, void *dev_id)
{ … }

static irqreturn_t rk3588_vpu981_irq(int irq, void *dev_id)
{ … }

static int rk3036_vpu_hw_init(struct hantro_dev *vpu)
{ … }

static int rk3066_vpu_hw_init(struct hantro_dev *vpu)
{ … }

static int rk3588_vpu981_hw_init(struct hantro_dev *vpu)
{ … }

static int rockchip_vpu_hw_init(struct hantro_dev *vpu)
{ … }

static void rk3066_vpu_dec_reset(struct hantro_ctx *ctx)
{ … }

static void rockchip_vpu1_enc_reset(struct hantro_ctx *ctx)
{ … }

static void rockchip_vpu2_dec_reset(struct hantro_ctx *ctx)
{ … }

static void rockchip_vpu2_enc_reset(struct hantro_ctx *ctx)
{ … }

/*
 * Supported codec ops.
 */
static const struct hantro_codec_ops rk3036_vpu_codec_ops[] = …;

static const struct hantro_codec_ops rk3066_vpu_codec_ops[] = …;

static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = …;

static const struct hantro_codec_ops rk3399_vpu_codec_ops[] = …;

static const struct hantro_codec_ops rk3568_vepu_codec_ops[] = …;

static const struct hantro_codec_ops rk3588_vpu981_codec_ops[] = …;
/*
 * VPU variant.
 */

static const struct hantro_irq rockchip_vdpu1_irqs[] = …;

static const struct hantro_irq rockchip_vpu1_irqs[] = …;

static const struct hantro_irq rockchip_vdpu2_irqs[] = …;

static const struct hantro_irq rockchip_vpu2_irqs[] = …;

static const struct hantro_irq rk3568_vepu_irqs[] = …;

static const char * const rk3066_vpu_clk_names[] = …;

static const struct hantro_irq rk3588_vpu981_irqs[] = …;

static const char * const rockchip_vpu_clk_names[] = …;

static const char * const rk3588_vpu981_vpu_clk_names[] = …;

/* VDPU1/VEPU1 */

const struct hantro_variant rk3036_vpu_variant = …;

/*
 * Despite this variant has separate clocks for decoder and encoder,
 * it's still required to enable all four of them for either decoding
 * or encoding and we can't split it in separate g1/h1 variants.
 */
const struct hantro_variant rk3066_vpu_variant = …;

const struct hantro_variant rk3288_vpu_variant = …;

/* VDPU2/VEPU2 */

const struct hantro_variant rk3328_vpu_variant = …;

/*
 * H.264 decoding explicitly disabled in RK3399.
 * This ensures userspace applications use the Rockchip VDEC core,
 * which has better performance.
 */
const struct hantro_variant rk3399_vpu_variant = …;

const struct hantro_variant rk3568_vepu_variant = …;

const struct hantro_variant rk3568_vpu_variant = …;

const struct hantro_variant px30_vpu_variant = …;

const struct hantro_variant rk3588_vpu981_variant = …;