/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates. * All rights reserved. */ #ifndef M00389_CVI_MEMMAP_PACKAGE_H #define M00389_CVI_MEMMAP_PACKAGE_H /******************************************************************* * Register Block * M00389_CVI_MEMMAP_PACKAGE_VHD_REGMAP *******************************************************************/ struct m00389_cvi_regmap { … }; #define M00389_CVI_REG_CONTROL_OFST … #define M00389_CVI_REG_FRAME_WIDTH_OFST … #define M00389_CVI_REG_FRAME_HEIGHT_OFST … #define M00389_CVI_REG_FREEWHEEL_PERIOD_OFST … #define M00389_CVI_REG_ERROR_COLOR_OFST … #define M00389_CVI_REG_STATUS_OFST … /******************************************************************* * Bit Mask for register * M00389_CVI_MEMMAP_PACKAGE_VHD_BITMAP *******************************************************************/ /* control [2:0] */ #define M00389_CONTROL_BITMAP_ENABLE_OFST … #define M00389_CONTROL_BITMAP_ENABLE_MSK … #define M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST … #define M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_MSK … #define M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST … #define M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_MSK … /* status [1:0] */ #define M00389_STATUS_BITMAP_LOCK_OFST … #define M00389_STATUS_BITMAP_LOCK_MSK … #define M00389_STATUS_BITMAP_ERROR_OFST … #define M00389_STATUS_BITMAP_ERROR_MSK … #endif /*M00389_CVI_MEMMAP_PACKAGE_H*/
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