linux/drivers/media/pci/solo6x10/solo6x10-tw28.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
 *
 * Original author:
 * Ben Collins <[email protected]>
 *
 * Additional work by:
 * John Brooks <[email protected]>
 */

#include <linux/kernel.h>
#include <linux/delay.h>

#include "solo6x10.h"
#include "solo6x10-tw28.h"

#define DEFAULT_HDELAY_NTSC
#define DEFAULT_HACTIVE_NTSC
#define DEFAULT_VDELAY_NTSC
#define DEFAULT_VACTIVE_NTSC

#define DEFAULT_HDELAY_PAL
#define DEFAULT_HACTIVE_PAL
#define DEFAULT_VDELAY_PAL
#define DEFAULT_VACTIVE_PAL


static const u8 tbl_tw2864_ntsc_template[] =;

static const u8 tbl_tw2864_pal_template[] =;

static const u8 tbl_tw2865_ntsc_template[] =;

static const u8 tbl_tw2865_pal_template[] =;

#define is_tw286x(__solo, __id)

static u8 tw_readbyte(struct solo_dev *solo_dev, int chip_id, u8 tw6x_off,
		      u8 tw_off)
{}

static void tw_writebyte(struct solo_dev *solo_dev, int chip_id,
			 u8 tw6x_off, u8 tw_off, u8 val)
{}

static void tw_write_and_verify(struct solo_dev *solo_dev, u8 addr, u8 off,
				u8 val)
{}

static int tw2865_setup(struct solo_dev *solo_dev, u8 dev_addr)
{}

static int tw2864_setup(struct solo_dev *solo_dev, u8 dev_addr)
{}

static int tw2815_setup(struct solo_dev *solo_dev, u8 dev_addr)
{}

#define FIRST_ACTIVE_LINE
#define LAST_ACTIVE_LINE

static void saa712x_write_regs(struct solo_dev *dev, const u8 *vals,
		int start, int n)
{}

#define SAA712x_reg7c

static void saa712x_setup(struct solo_dev *dev)
{}

int solo_tw28_init(struct solo_dev *solo_dev)
{}

/*
 * We accessed the video status signal in the Techwell chip through
 * iic/i2c because the video status reported by register REG_VI_STATUS1
 * (address 0x012C) of the SOLO6010 chip doesn't give the correct video
 * status signal values.
 */
int tw28_get_video_status(struct solo_dev *solo_dev, u8 ch)
{}

#if 0
/* Status of audio from up to 4 techwell chips are combined into 1 variable.
 * See techwell datasheet for details. */
u16 tw28_get_audio_status(struct solo_dev *solo_dev)
{
	u8 val;
	u16 status = 0;
	int i;

	for (i = 0; i < solo_dev->tw28_cnt; i++) {
		val = (tw_readbyte(solo_dev, i, TW286x_AV_STAT_ADDR,
				   TW_AV_STAT_ADDR) & 0xf0) >> 4;
		status |= val << (i * 4);
	}

	return status;
}
#endif

bool tw28_has_sharpness(struct solo_dev *solo_dev, u8 ch)
{}

int tw28_set_ctrl_val(struct solo_dev *solo_dev, u32 ctrl, u8 ch,
		      s32 val)
{}

int tw28_get_ctrl_val(struct solo_dev *solo_dev, u32 ctrl, u8 ch,
		      s32 *val)
{}

#if 0
/*
 * For audio output volume, the output channel is only 1. In this case we
 * don't need to offset TW_CHIP_OFFSET_ADDR. The TW_CHIP_OFFSET_ADDR used
 * is the base address of the techwell chip.
 */
void tw2815_Set_AudioOutVol(struct solo_dev *solo_dev, unsigned int u_val)
{
	unsigned int val;
	unsigned int chip_num;

	chip_num = (solo_dev->nr_chans - 1) / 4;

	val = tw_readbyte(solo_dev, chip_num, TW286x_AUDIO_OUTPUT_VOL_ADDR,
			  TW_AUDIO_OUTPUT_VOL_ADDR);

	u_val = (val & 0x0f) | (u_val << 4);

	tw_writebyte(solo_dev, chip_num, TW286x_AUDIO_OUTPUT_VOL_ADDR,
		     TW_AUDIO_OUTPUT_VOL_ADDR, u_val);
}
#endif

u8 tw28_get_audio_gain(struct solo_dev *solo_dev, u8 ch)
{}

void tw28_set_audio_gain(struct solo_dev *solo_dev, u8 ch, u8 val)
{}