linux/drivers/ptp/ptp_idt82p33.c

// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2018 Integrated Device Technology, Inc
//

#define pr_fmt(fmt) …

#include <linux/firmware.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/ptp_clock_kernel.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/timekeeping.h>
#include <linux/bitops.h>
#include <linux/of.h>
#include <linux/mfd/rsmu.h>
#include <linux/mfd/idt82p33_reg.h>

#include "ptp_private.h"
#include "ptp_idt82p33.h"

MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_VERSION(…) …;
MODULE_LICENSE(…) …;
MODULE_FIRMWARE(…);

#define EXTTS_PERIOD_MS …

/* Module Parameters */
static u32 phase_snap_threshold = …;
module_param(phase_snap_threshold, uint, 0);
MODULE_PARM_DESC(…) …;

static char *firmware;
module_param(firmware, charp, 0);

static struct ptp_pin_desc pin_config[MAX_PHC_PLL][MAX_TRIG_CLK];

static inline int idt82p33_read(struct idt82p33 *idt82p33, u16 regaddr,
				u8 *buf, u16 count)
{ … }

static inline int idt82p33_write(struct idt82p33 *idt82p33, u16 regaddr,
				 u8 *buf, u16 count)
{ … }

static void idt82p33_byte_array_to_timespec(struct timespec64 *ts,
					    u8 buf[TOD_BYTE_COUNT])
{ … }

static void idt82p33_timespec_to_byte_array(struct timespec64 const *ts,
					    u8 buf[TOD_BYTE_COUNT])
{ … }

static int idt82p33_dpll_set_mode(struct idt82p33_channel *channel,
				  enum pll_mode mode)
{ … }

static int idt82p33_set_tod_trigger(struct idt82p33_channel *channel,
				    u8 trigger, bool write)
{ … }

static int idt82p33_get_extts(struct idt82p33_channel *channel,
			      struct timespec64 *ts)
{ … }

static int map_ref_to_tod_trig_sel(int ref, u8 *trigger)
{ … }

static bool is_one_shot(u8 mask)
{ … }

static int arm_tod_read_with_trigger(struct idt82p33_channel *channel, u8 trigger)
{ … }

static int idt82p33_extts_enable(struct idt82p33_channel *channel,
				 struct ptp_clock_request *rq, int on)
{ … }

static int idt82p33_extts_check_channel(struct idt82p33 *idt82p33, u8 todn)
{ … }

static u8 idt82p33_extts_enable_mask(struct idt82p33_channel *channel,
				     u8 extts_mask, bool enable)
{ … }

static int _idt82p33_gettime(struct idt82p33_channel *channel,
			     struct timespec64 *ts)
{ … }

/*
 *   TOD Trigger:
 *   Bits[7:4] Write 0x9, MSB write
 *   Bits[3:0] Read 0x9, LSB read
 */

static int _idt82p33_settime(struct idt82p33_channel *channel,
			     struct timespec64 const *ts)
{ … }

static int _idt82p33_adjtime_immediate(struct idt82p33_channel *channel,
				       s64 delta_ns)
{ … }

static int _idt82p33_adjtime_internal_triggered(struct idt82p33_channel *channel,
						s64 delta_ns)
{ … }

static void idt82p33_adjtime_workaround(struct work_struct *work)
{ … }

static int _idt82p33_adjfine(struct idt82p33_channel *channel, long scaled_ppm)
{ … }

/* ppb = scaled_ppm * 125 / 2^13 */
static s32 idt82p33_ddco_scaled_ppm(long current_ppm, s32 ddco_ppb)
{ … }

static int idt82p33_stop_ddco(struct idt82p33_channel *channel)
{ … }

static int idt82p33_start_ddco(struct idt82p33_channel *channel, s32 delta_ns)
{ … }

static int idt82p33_measure_one_byte_write_overhead(
		struct idt82p33_channel *channel, s64 *overhead_ns)
{ … }

static int idt82p33_measure_one_byte_read_overhead(
		struct idt82p33_channel *channel, s64 *overhead_ns)
{ … }

static int idt82p33_measure_tod_write_9_byte_overhead(
		struct idt82p33_channel *channel)
{ … }

static int idt82p33_measure_settime_gettime_gap_overhead(
		struct idt82p33_channel *channel, s64 *overhead_ns)
{ … }

static int idt82p33_measure_tod_write_overhead(struct idt82p33_channel *channel)
{ … }

static int idt82p33_check_and_set_masks(struct idt82p33 *idt82p33,
					u8 page,
					u8 offset,
					u8 val)
{ … }

static void idt82p33_display_masks(struct idt82p33 *idt82p33)
{ … }

static int idt82p33_sync_tod(struct idt82p33_channel *channel, bool enable)
{ … }

static long idt82p33_work_handler(struct ptp_clock_info *ptp)
{ … }

static int idt82p33_output_enable(struct idt82p33_channel *channel,
				  bool enable, unsigned int outn)
{ … }

static int idt82p33_perout_enable(struct idt82p33_channel *channel,
				  bool enable,
				  struct ptp_perout_request *perout)
{ … }

static int idt82p33_enable_tod(struct idt82p33_channel *channel)
{ … }

static void idt82p33_ptp_clock_unregister_all(struct idt82p33 *idt82p33)
{ … }



static int idt82p33_enable(struct ptp_clock_info *ptp,
			   struct ptp_clock_request *rq, int on)
{ … }

static s32 idt82p33_getmaxphase(__always_unused struct ptp_clock_info *ptp)
{ … }

static int idt82p33_adjwritephase(struct ptp_clock_info *ptp, s32 offset_ns)
{ … }

static int idt82p33_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
{ … }

static int idt82p33_adjtime(struct ptp_clock_info *ptp, s64 delta_ns)
{ … }

static int idt82p33_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
{ … }

static int idt82p33_settime(struct ptp_clock_info *ptp,
			    const struct timespec64 *ts)
{ … }

static int idt82p33_channel_init(struct idt82p33 *idt82p33, u32 index)
{ … }

static int idt82p33_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
			       enum ptp_pin_function func, unsigned int chan)
{ … }

static void idt82p33_caps_init(u32 index, struct ptp_clock_info *caps,
			       struct ptp_pin_desc *pin_cfg, u8 max_pins)
{ … }

static int idt82p33_enable_channel(struct idt82p33 *idt82p33, u32 index)
{ … }

static int idt82p33_reset(struct idt82p33 *idt82p33, bool cold)
{ … }

static int idt82p33_load_firmware(struct idt82p33 *idt82p33)
{ … }

static void idt82p33_extts_check(struct work_struct *work)
{ … }

static int idt82p33_probe(struct platform_device *pdev)
{ … }

static void idt82p33_remove(struct platform_device *pdev)
{ … }

static struct platform_driver idt82p33_driver = …;

module_platform_driver(…) …;