linux/drivers/hwmon/peci/cputemp.c

// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2018-2021 Intel Corporation

#include <linux/auxiliary_bus.h>
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/hwmon.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/peci.h>
#include <linux/peci-cpu.h>
#include <linux/units.h>

#include "common.h"

#define CORE_NUMS_MAX

#define BASE_CHANNEL_NUMS
#define CPUTEMP_CHANNEL_NUMS

#define TEMP_TARGET_FAN_TEMP_MASK
#define TEMP_TARGET_REF_TEMP_MASK
#define TEMP_TARGET_TJ_OFFSET_MASK

#define DTS_MARGIN_MASK
#define PCS_MODULE_TEMP_MASK

struct resolved_cores_reg {};

struct cpu_info {};

struct peci_temp_target {};

enum peci_temp_target_type {};

struct peci_cputemp {};

enum cputemp_channels {};

static const char * const cputemp_label[BASE_CHANNEL_NUMS] =;

static int update_temp_target(struct peci_cputemp *priv)
{}

static int get_temp_target(struct peci_cputemp *priv, enum peci_temp_target_type type, long *val)
{}

/*
 * Error codes:
 *   0x8000: General sensor error
 *   0x8001: Reserved
 *   0x8002: Underflow on reading value
 *   0x8003-0x81ff: Reserved
 */
static bool dts_valid(u16 val)
{}

/*
 * Processors return a value of DTS reading in S10.6 fixed point format
 * (16 bits: 10-bit signed magnitude, 6-bit fraction).
 */
static s32 dts_ten_dot_six_to_millidegree(u16 val)
{}

/*
 * For older processors, thermal margin reading is returned in S8.8 fixed
 * point format (16 bits: 8-bit signed magnitude, 8-bit fraction).
 */
static s32 dts_eight_dot_eight_to_millidegree(u16 val)
{}

static int get_die_temp(struct peci_cputemp *priv, long *val)
{}

static int get_dts(struct peci_cputemp *priv, long *val)
{}

static int get_core_temp(struct peci_cputemp *priv, int core_index, long *val)
{}

static int cputemp_read_string(struct device *dev, enum hwmon_sensor_types type,
			       u32 attr, int channel, const char **str)
{}

static int cputemp_read(struct device *dev, enum hwmon_sensor_types type,
			u32 attr, int channel, long *val)
{}

static umode_t cputemp_is_visible(const void *data, enum hwmon_sensor_types type,
				  u32 attr, int channel)
{}

static int init_core_mask(struct peci_cputemp *priv)
{}

static int create_temp_label(struct peci_cputemp *priv)
{}

static void check_resolved_cores(struct peci_cputemp *priv)
{}

static void sensor_init(struct peci_cputemp *priv)
{}

static const struct hwmon_ops peci_cputemp_ops =;

static const struct hwmon_channel_info * const peci_cputemp_info[] =;

static const struct hwmon_chip_info peci_cputemp_chip_info =;

static int peci_cputemp_probe(struct auxiliary_device *adev,
			      const struct auxiliary_device_id *id)
{}

/*
 * RESOLVED_CORES PCI configuration register may have different location on
 * different platforms.
 */
static struct resolved_cores_reg resolved_cores_reg_hsx =;

static struct resolved_cores_reg resolved_cores_reg_icx =;

static struct resolved_cores_reg resolved_cores_reg_spr =;

static const struct cpu_info cpu_hsx =;

static const struct cpu_info cpu_skx =;

static const struct cpu_info cpu_icx =;

static const struct cpu_info cpu_spr =;

static const struct auxiliary_device_id peci_cputemp_ids[] =;
MODULE_DEVICE_TABLE(auxiliary, peci_cputemp_ids);

static struct auxiliary_driver peci_cputemp_driver =;

module_auxiliary_driver();

MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_IMPORT_NS();