// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (c) 2016 Google, Inc */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/errno.h> #include <linux/gpio/consumer.h> #include <linux/hwmon.h> #include <linux/hwmon-sysfs.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/reset.h> #include <linux/sysfs.h> #include <linux/thermal.h> /* ASPEED PWM & FAN Tach Register Definition */ #define ASPEED_PTCR_CTRL … #define ASPEED_PTCR_CLK_CTRL … #define ASPEED_PTCR_DUTY0_CTRL … #define ASPEED_PTCR_DUTY1_CTRL … #define ASPEED_PTCR_TYPEM_CTRL … #define ASPEED_PTCR_TYPEM_CTRL1 … #define ASPEED_PTCR_TYPEN_CTRL … #define ASPEED_PTCR_TYPEN_CTRL1 … #define ASPEED_PTCR_TACH_SOURCE … #define ASPEED_PTCR_TRIGGER … #define ASPEED_PTCR_RESULT … #define ASPEED_PTCR_INTR_CTRL … #define ASPEED_PTCR_INTR_STS … #define ASPEED_PTCR_TYPEM_LIMIT … #define ASPEED_PTCR_TYPEN_LIMIT … #define ASPEED_PTCR_CTRL_EXT … #define ASPEED_PTCR_CLK_CTRL_EXT … #define ASPEED_PTCR_DUTY2_CTRL … #define ASPEED_PTCR_DUTY3_CTRL … #define ASPEED_PTCR_TYPEO_CTRL … #define ASPEED_PTCR_TYPEO_CTRL1 … #define ASPEED_PTCR_TACH_SOURCE_EXT … #define ASPEED_PTCR_TYPEO_LIMIT … /* ASPEED_PTCR_CTRL : 0x00 - General Control Register */ #define ASPEED_PTCR_CTRL_SET_PWMD_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMD_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMD_TYPE_MASK … #define ASPEED_PTCR_CTRL_SET_PWMC_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMC_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMC_TYPE_MASK … #define ASPEED_PTCR_CTRL_SET_PWMB_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMB_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMB_TYPE_MASK … #define ASPEED_PTCR_CTRL_SET_PWMA_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMA_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMA_TYPE_MASK … #define ASPEED_PTCR_CTRL_FAN_NUM_EN(x) … #define ASPEED_PTCR_CTRL_PWMD_EN … #define ASPEED_PTCR_CTRL_PWMC_EN … #define ASPEED_PTCR_CTRL_PWMB_EN … #define ASPEED_PTCR_CTRL_PWMA_EN … #define ASPEED_PTCR_CTRL_CLK_SRC … #define ASPEED_PTCR_CTRL_CLK_EN … /* ASPEED_PTCR_CLK_CTRL : 0x04 - Clock Control Register */ /* TYPE N */ #define ASPEED_PTCR_CLK_CTRL_TYPEN_MASK … #define ASPEED_PTCR_CLK_CTRL_TYPEN_UNIT … #define ASPEED_PTCR_CLK_CTRL_TYPEN_H … #define ASPEED_PTCR_CLK_CTRL_TYPEN_L … /* TYPE M */ #define ASPEED_PTCR_CLK_CTRL_TYPEM_MASK … #define ASPEED_PTCR_CLK_CTRL_TYPEM_UNIT … #define ASPEED_PTCR_CLK_CTRL_TYPEM_H … #define ASPEED_PTCR_CLK_CTRL_TYPEM_L … /* * ASPEED_PTCR_DUTY_CTRL/1/2/3 : 0x08/0x0C/0x48/0x4C - PWM-FAN duty control * 0/1/2/3 register */ #define DUTY_CTRL_PWM2_FALL_POINT … #define DUTY_CTRL_PWM2_RISE_POINT … #define DUTY_CTRL_PWM2_RISE_FALL_MASK … #define DUTY_CTRL_PWM1_FALL_POINT … #define DUTY_CTRL_PWM1_RISE_POINT … #define DUTY_CTRL_PWM1_RISE_FALL_MASK … /* ASPEED_PTCR_TYPEM_CTRL : 0x10/0x18/0x50 - Type M/N/O Ctrl 0 Register */ #define TYPE_CTRL_FAN_MASK … #define TYPE_CTRL_FAN1_MASK … #define TYPE_CTRL_FAN_PERIOD … #define TYPE_CTRL_FAN_MODE … #define TYPE_CTRL_FAN_DIVISION … #define TYPE_CTRL_FAN_TYPE_EN … /* ASPEED_PTCR_TACH_SOURCE : 0x20/0x60 - Tach Source Register */ /* bit [0,1] at 0x20, bit [2] at 0x60 */ #define TACH_PWM_SOURCE_BIT01(x) … #define TACH_PWM_SOURCE_BIT2(x) … #define TACH_PWM_SOURCE_MASK_BIT01(x) … #define TACH_PWM_SOURCE_MASK_BIT2(x) … /* ASPEED_PTCR_RESULT : 0x2c - Result Register */ #define RESULT_STATUS_MASK … #define RESULT_VALUE_MASK … /* ASPEED_PTCR_CTRL_EXT : 0x40 - General Control Extension #1 Register */ #define ASPEED_PTCR_CTRL_SET_PWMH_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMH_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMH_TYPE_MASK … #define ASPEED_PTCR_CTRL_SET_PWMG_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMG_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMG_TYPE_MASK … #define ASPEED_PTCR_CTRL_SET_PWMF_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWMF_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWMF_TYPE_MASK … #define ASPEED_PTCR_CTRL_SET_PWME_TYPE_PART1 … #define ASPEED_PTCR_CTRL_SET_PWME_TYPE_PART2 … #define ASPEED_PTCR_CTRL_SET_PWME_TYPE_MASK … #define ASPEED_PTCR_CTRL_PWMH_EN … #define ASPEED_PTCR_CTRL_PWMG_EN … #define ASPEED_PTCR_CTRL_PWMF_EN … #define ASPEED_PTCR_CTRL_PWME_EN … /* ASPEED_PTCR_CLK_EXT_CTRL : 0x44 - Clock Control Extension #1 Register */ /* TYPE O */ #define ASPEED_PTCR_CLK_CTRL_TYPEO_MASK … #define ASPEED_PTCR_CLK_CTRL_TYPEO_UNIT … #define ASPEED_PTCR_CLK_CTRL_TYPEO_H … #define ASPEED_PTCR_CLK_CTRL_TYPEO_L … #define PWM_MAX … #define BOTH_EDGES … #define M_PWM_DIV_H … #define M_PWM_DIV_L … #define M_PWM_PERIOD … #define M_TACH_CLK_DIV … /* * 5:4 Type N fan tach mode selection bit: * 00: falling * 01: rising * 10: both * 11: reserved. */ #define M_TACH_MODE … #define M_TACH_UNIT … #define INIT_FAN_CTRL … /* How long we sleep in us while waiting for an RPM result. */ #define ASPEED_RPM_STATUS_SLEEP_USEC … #define MAX_CDEV_NAME_LEN … #define MAX_ASPEED_FAN_TACH_CHANNELS … struct aspeed_cooling_device { … }; struct aspeed_pwm_tacho_data { … }; enum type { … }; struct type_params { … }; static const struct type_params type_params[] = …; enum pwm_port { … }; struct pwm_port_params { … }; static const struct pwm_port_params pwm_port_params[] = …; static int regmap_aspeed_pwm_tacho_reg_write(void *context, unsigned int reg, unsigned int val) { … } static int regmap_aspeed_pwm_tacho_reg_read(void *context, unsigned int reg, unsigned int *val) { … } static const struct regmap_config aspeed_pwm_tacho_regmap_config = …; static void aspeed_set_clock_enable(struct regmap *regmap, bool val) { … } static void aspeed_set_clock_source(struct regmap *regmap, int val) { … } static void aspeed_set_pwm_clock_values(struct regmap *regmap, u8 type, u8 div_high, u8 div_low, u8 unit) { … } static void aspeed_set_pwm_port_enable(struct regmap *regmap, u8 pwm_port, bool enable) { … } static void aspeed_set_pwm_port_type(struct regmap *regmap, u8 pwm_port, u8 type) { … } static void aspeed_set_pwm_port_duty_rising_falling(struct regmap *regmap, u8 pwm_port, u8 rising, u8 falling) { … } static void aspeed_set_tacho_type_enable(struct regmap *regmap, u8 type, bool enable) { … } static void aspeed_set_tacho_type_values(struct regmap *regmap, u8 type, u8 mode, u16 unit, u8 division) { … } static void aspeed_set_fan_tach_ch_enable(struct regmap *regmap, u8 fan_tach_ch, bool enable) { … } static void aspeed_set_fan_tach_ch_source(struct regmap *regmap, u8 fan_tach_ch, u8 fan_tach_ch_source) { … } static void aspeed_set_pwm_port_fan_ctrl(struct aspeed_pwm_tacho_data *priv, u8 index, u8 fan_ctrl) { … } static u32 aspeed_get_fan_tach_ch_measure_period(struct aspeed_pwm_tacho_data *priv, u8 type) { … } static int aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, u8 fan_tach_ch) { … } static ssize_t pwm_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } static ssize_t pwm_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t rpm_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static umode_t pwm_is_visible(struct kobject *kobj, struct attribute *a, int index) { … } static umode_t fan_dev_is_visible(struct kobject *kobj, struct attribute *a, int index) { … } static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0); static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1); static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2); static SENSOR_DEVICE_ATTR_RW(pwm4, pwm, 3); static SENSOR_DEVICE_ATTR_RW(pwm5, pwm, 4); static SENSOR_DEVICE_ATTR_RW(pwm6, pwm, 5); static SENSOR_DEVICE_ATTR_RW(pwm7, pwm, 6); static SENSOR_DEVICE_ATTR_RW(pwm8, pwm, 7); static struct attribute *pwm_dev_attrs[] = …; static const struct attribute_group pwm_dev_group = …; static SENSOR_DEVICE_ATTR_RO(fan1_input, rpm, 0); static SENSOR_DEVICE_ATTR_RO(fan2_input, rpm, 1); static SENSOR_DEVICE_ATTR_RO(fan3_input, rpm, 2); static SENSOR_DEVICE_ATTR_RO(fan4_input, rpm, 3); static SENSOR_DEVICE_ATTR_RO(fan5_input, rpm, 4); static SENSOR_DEVICE_ATTR_RO(fan6_input, rpm, 5); static SENSOR_DEVICE_ATTR_RO(fan7_input, rpm, 6); static SENSOR_DEVICE_ATTR_RO(fan8_input, rpm, 7); static SENSOR_DEVICE_ATTR_RO(fan9_input, rpm, 8); static SENSOR_DEVICE_ATTR_RO(fan10_input, rpm, 9); static SENSOR_DEVICE_ATTR_RO(fan11_input, rpm, 10); static SENSOR_DEVICE_ATTR_RO(fan12_input, rpm, 11); static SENSOR_DEVICE_ATTR_RO(fan13_input, rpm, 12); static SENSOR_DEVICE_ATTR_RO(fan14_input, rpm, 13); static SENSOR_DEVICE_ATTR_RO(fan15_input, rpm, 14); static SENSOR_DEVICE_ATTR_RO(fan16_input, rpm, 15); static struct attribute *fan_dev_attrs[] = …; static const struct attribute_group fan_dev_group = …; /* * The clock type is type M : * The PWM frequency = 24MHz / (type M clock division L bit * * type M clock division H bit * (type M PWM period bit + 1)) */ static void aspeed_create_type(struct aspeed_pwm_tacho_data *priv) { … } static void aspeed_create_pwm_port(struct aspeed_pwm_tacho_data *priv, u8 pwm_port) { … } static int aspeed_create_fan_tach_channel(struct device *dev, struct aspeed_pwm_tacho_data *priv, u8 *fan_tach_ch, int count, u8 pwm_source) { … } static int aspeed_pwm_cz_get_max_state(struct thermal_cooling_device *tcdev, unsigned long *state) { … } static int aspeed_pwm_cz_get_cur_state(struct thermal_cooling_device *tcdev, unsigned long *state) { … } static int aspeed_pwm_cz_set_cur_state(struct thermal_cooling_device *tcdev, unsigned long state) { … } static const struct thermal_cooling_device_ops aspeed_pwm_cool_ops = …; static int aspeed_create_pwm_cooling(struct device *dev, struct device_node *child, struct aspeed_pwm_tacho_data *priv, u32 pwm_port, u8 num_levels) { … } static int aspeed_create_fan(struct device *dev, struct device_node *child, struct aspeed_pwm_tacho_data *priv) { … } static void aspeed_pwm_tacho_remove(void *data) { … } static int aspeed_pwm_tacho_probe(struct platform_device *pdev) { … } static const struct of_device_id of_pwm_tacho_match_table[] = …; MODULE_DEVICE_TABLE(of, of_pwm_tacho_match_table); static struct platform_driver aspeed_pwm_tacho_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux