// SPDX-License-Identifier: GPL-2.0-or-later /* * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x, SCH5027, * and SCH5127 Super-I/O chips integrated hardware monitoring * features. * Copyright (c) 2007, 2008, 2009, 2010 Juerg Haefliger <[email protected]> * * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus * if a SCH311x or SCH5127 chip is found. Both types of chips have very * similar hardware monitoring capabilities but differ in the way they can be * accessed. */ #define pr_fmt(fmt) … #include <linux/module.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/jiffies.h> #include <linux/i2c.h> #include <linux/platform_device.h> #include <linux/hwmon.h> #include <linux/hwmon-sysfs.h> #include <linux/hwmon-vid.h> #include <linux/err.h> #include <linux/mutex.h> #include <linux/acpi.h> #include <linux/io.h> /* ISA device, if found */ static struct platform_device *pdev; /* Module load parameters */ static bool force_start; module_param(force_start, bool, 0); MODULE_PARM_DESC(…) …; static unsigned short force_id; module_param(force_id, ushort, 0); MODULE_PARM_DESC(…) …; static bool probe_all_addr; module_param(probe_all_addr, bool, 0); MODULE_PARM_DESC(…) …; /* Addresses to scan */ static const unsigned short normal_i2c[] = …; enum chips { … }; #define DO_REPORT … /* --------------------------------------------------------------------- * Registers * * The sensors are defined as follows: * * Voltages Temperatures * -------- ------------ * in0 +5VTR (+5V stdby) temp1 Remote diode 1 * in1 Vccp (proc core) temp2 Internal temp * in2 VCC (internal +3.3V) temp3 Remote diode 2 * in3 +5V * in4 +12V * in5 VTR (+3.3V stby) * in6 Vbat * in7 Vtrip (sch5127 only) * * --------------------------------------------------------------------- */ /* Voltages (in) numbered 0-7 (ix) */ #define DME1737_REG_IN(ix) … #define DME1737_REG_IN_MIN(ix) … #define DME1737_REG_IN_MAX(ix) … /* Temperatures (temp) numbered 0-2 (ix) */ #define DME1737_REG_TEMP(ix) … #define DME1737_REG_TEMP_MIN(ix) … #define DME1737_REG_TEMP_MAX(ix) … #define DME1737_REG_TEMP_OFFSET(ix) … /* * Voltage and temperature LSBs * The LSBs (4 bits each) are stored in 5 registers with the following layouts: * IN_TEMP_LSB(0) = [in5, in6] * IN_TEMP_LSB(1) = [temp3, temp1] * IN_TEMP_LSB(2) = [in4, temp2] * IN_TEMP_LSB(3) = [in3, in0] * IN_TEMP_LSB(4) = [in2, in1] * IN_TEMP_LSB(5) = [res, in7] */ #define DME1737_REG_IN_TEMP_LSB(ix) … static const u8 DME1737_REG_IN_LSB[] = …; static const u8 DME1737_REG_IN_LSB_SHL[] = …; static const u8 DME1737_REG_TEMP_LSB[] = …; static const u8 DME1737_REG_TEMP_LSB_SHL[] = …; /* Fans numbered 0-5 (ix) */ #define DME1737_REG_FAN(ix) … #define DME1737_REG_FAN_MIN(ix) … #define DME1737_REG_FAN_OPT(ix) … #define DME1737_REG_FAN_MAX(ix) … /* PWMs numbered 0-2, 4-5 (ix) */ #define DME1737_REG_PWM(ix) … #define DME1737_REG_PWM_CONFIG(ix) … #define DME1737_REG_PWM_MIN(ix) … #define DME1737_REG_PWM_FREQ(ix) … /* * The layout of the ramp rate registers is different from the other pwm * registers. The bits for the 3 PWMs are stored in 2 registers: * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ #define DME1737_REG_PWM_RR(ix) … /* Thermal zones 0-2 */ #define DME1737_REG_ZONE_LOW(ix) … #define DME1737_REG_ZONE_ABS(ix) … /* * The layout of the hysteresis registers is different from the other zone * registers. The bits for the 3 zones are stored in 2 registers: * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ #define DME1737_REG_ZONE_HYST(ix) … /* * Alarm registers and bit mapping * The 3 8-bit alarm registers will be concatenated to a single 32-bit * alarm value [0, ALARM3, ALARM2, ALARM1]. */ #define DME1737_REG_ALARM1 … #define DME1737_REG_ALARM2 … #define DME1737_REG_ALARM3 … static const u8 DME1737_BIT_ALARM_IN[] = …; static const u8 DME1737_BIT_ALARM_TEMP[] = …; static const u8 DME1737_BIT_ALARM_FAN[] = …; /* Miscellaneous registers */ #define DME1737_REG_DEVICE … #define DME1737_REG_COMPANY … #define DME1737_REG_VERSTEP … #define DME1737_REG_CONFIG … #define DME1737_REG_CONFIG2 … #define DME1737_REG_VID … #define DME1737_REG_TACH_PWM … /* --------------------------------------------------------------------- * Misc defines * --------------------------------------------------------------------- */ /* Chip identification */ #define DME1737_COMPANY_SMSC … #define DME1737_VERSTEP … #define DME1737_VERSTEP_MASK … #define SCH311X_DEVICE … #define SCH5027_VERSTEP … #define SCH5127_DEVICE … /* Device ID values (global configuration register index 0x20) */ #define DME1737_ID_1 … #define DME1737_ID_2 … #define SCH3112_ID … #define SCH3114_ID … #define SCH3116_ID … #define SCH5027_ID … #define SCH5127_ID … /* Length of ISA address segment */ #define DME1737_EXTENT … /* chip-dependent features */ #define HAS_TEMP_OFFSET … #define HAS_VID … #define HAS_ZONE3 … #define HAS_ZONE_HYST … #define HAS_PWM_MIN … #define HAS_FAN(ix) … #define HAS_PWM(ix) … #define HAS_IN7 … /* --------------------------------------------------------------------- * Data structures and manipulation thereof * --------------------------------------------------------------------- */ struct dme1737_data { … }; /* Nominal voltage values */ static const int IN_NOMINAL_DME1737[] = …; static const int IN_NOMINAL_SCH311x[] = …; static const int IN_NOMINAL_SCH5027[] = …; static const int IN_NOMINAL_SCH5127[] = …; #define IN_NOMINAL(type) … /* * Voltage input * Voltage inputs have 16 bits resolution, limit values have 8 bits * resolution. */ static inline int IN_FROM_REG(int reg, int nominal, int res) { … } static inline int IN_TO_REG(long val, int nominal) { … } /* * Temperature input * The register values represent temperatures in 2's complement notation from * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit * values have 8 bits resolution. */ static inline int TEMP_FROM_REG(int reg, int res) { … } static inline int TEMP_TO_REG(long val) { … } /* Temperature range */ static const int TEMP_RANGE[] = …; static inline int TEMP_RANGE_FROM_REG(int reg) { … } static int TEMP_RANGE_TO_REG(long val, int reg) { … } /* * Temperature hysteresis * Register layout: * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ static inline int TEMP_HYST_FROM_REG(int reg, int ix) { … } static inline int TEMP_HYST_TO_REG(int temp, long hyst, int ix, int reg) { … } /* Fan input RPM */ static inline int FAN_FROM_REG(int reg, int tpc) { … } static inline int FAN_TO_REG(long val, int tpc) { … } /* * Fan TPC (tach pulse count) * Converts a register value to a TPC multiplier or returns 0 if the tachometer * is configured in legacy (non-tpc) mode */ static inline int FAN_TPC_FROM_REG(int reg) { … } /* * Fan type * The type of a fan is expressed in number of pulses-per-revolution that it * emits */ static inline int FAN_TYPE_FROM_REG(int reg) { … } static inline int FAN_TYPE_TO_REG(long val, int reg) { … } /* Fan max RPM */ static const int FAN_MAX[] = …; static int FAN_MAX_FROM_REG(int reg) { … } static int FAN_MAX_TO_REG(long val) { … } /* * PWM enable * Register to enable mapping: * 000: 2 fan on zone 1 auto * 001: 2 fan on zone 2 auto * 010: 2 fan on zone 3 auto * 011: 0 fan full on * 100: -1 fan disabled * 101: 2 fan on hottest of zones 2,3 auto * 110: 2 fan on hottest of zones 1,2,3 auto * 111: 1 fan in manual mode */ static inline int PWM_EN_FROM_REG(int reg) { … } static inline int PWM_EN_TO_REG(int val, int reg) { … } /* * PWM auto channels zone * Register to auto channels zone mapping (ACZ is a bitfield with bit x * corresponding to zone x+1): * 000: 001 fan on zone 1 auto * 001: 010 fan on zone 2 auto * 010: 100 fan on zone 3 auto * 011: 000 fan full on * 100: 000 fan disabled * 101: 110 fan on hottest of zones 2,3 auto * 110: 111 fan on hottest of zones 1,2,3 auto * 111: 000 fan in manual mode */ static inline int PWM_ACZ_FROM_REG(int reg) { … } static inline int PWM_ACZ_TO_REG(long val, int reg) { … } /* PWM frequency */ static const int PWM_FREQ[] = …; static inline int PWM_FREQ_FROM_REG(int reg) { … } static int PWM_FREQ_TO_REG(long val, int reg) { … } /* * PWM ramp rate * Register layout: * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ static const u8 PWM_RR[] = …; static inline int PWM_RR_FROM_REG(int reg, int ix) { … } static int PWM_RR_TO_REG(long val, int ix, int reg) { … } /* PWM ramp rate enable */ static inline int PWM_RR_EN_FROM_REG(int reg, int ix) { … } static inline int PWM_RR_EN_TO_REG(long val, int ix, int reg) { … } /* * PWM min/off * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for * the register layout). */ static inline int PWM_OFF_FROM_REG(int reg, int ix) { … } static inline int PWM_OFF_TO_REG(int val, int ix, int reg) { … } /* --------------------------------------------------------------------- * Device I/O access * * ISA access is performed through an index/data register pair and needs to * be protected by a mutex during runtime (not required for initialization). * We use data->update_lock for this and need to ensure that we acquire it * before calling dme1737_read or dme1737_write. * --------------------------------------------------------------------- */ static u8 dme1737_read(const struct dme1737_data *data, u8 reg) { … } static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) { … } static struct dme1737_data *dme1737_update_device(struct device *dev) { … } /* --------------------------------------------------------------------- * Voltage sysfs attributes * ix = [0-7] * --------------------------------------------------------------------- */ #define SYS_IN_INPUT … #define SYS_IN_MIN … #define SYS_IN_MAX … #define SYS_IN_ALARM … static ssize_t show_in(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t set_in(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } /* --------------------------------------------------------------------- * Temperature sysfs attributes * ix = [0-2] * --------------------------------------------------------------------- */ #define SYS_TEMP_INPUT … #define SYS_TEMP_MIN … #define SYS_TEMP_MAX … #define SYS_TEMP_OFFSET … #define SYS_TEMP_ALARM … #define SYS_TEMP_FAULT … static ssize_t show_temp(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t set_temp(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } /* --------------------------------------------------------------------- * Zone sysfs attributes * ix = [0-2] * --------------------------------------------------------------------- */ #define SYS_ZONE_AUTO_CHANNELS_TEMP … #define SYS_ZONE_AUTO_POINT1_TEMP_HYST … #define SYS_ZONE_AUTO_POINT1_TEMP … #define SYS_ZONE_AUTO_POINT2_TEMP … #define SYS_ZONE_AUTO_POINT3_TEMP … static ssize_t show_zone(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t set_zone(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } /* --------------------------------------------------------------------- * Fan sysfs attributes * ix = [0-5] * --------------------------------------------------------------------- */ #define SYS_FAN_INPUT … #define SYS_FAN_MIN … #define SYS_FAN_MAX … #define SYS_FAN_ALARM … #define SYS_FAN_TYPE … static ssize_t show_fan(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t set_fan(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } /* --------------------------------------------------------------------- * PWM sysfs attributes * ix = [0-4] * --------------------------------------------------------------------- */ #define SYS_PWM … #define SYS_PWM_FREQ … #define SYS_PWM_ENABLE … #define SYS_PWM_RAMP_RATE … #define SYS_PWM_AUTO_CHANNELS_ZONE … #define SYS_PWM_AUTO_PWM_MIN … #define SYS_PWM_AUTO_POINT1_PWM … #define SYS_PWM_AUTO_POINT2_PWM … static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, char *buf) { … } static struct attribute *dme1737_pwm_chmod_attr[]; static void dme1737_chmod_file(struct device*, struct attribute*, umode_t); static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } /* --------------------------------------------------------------------- * Miscellaneous sysfs attributes * --------------------------------------------------------------------- */ static ssize_t vrm_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t vrm_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { … } static ssize_t cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t name_show(struct device *dev, struct device_attribute *attr, char *buf) { … } /* --------------------------------------------------------------------- * Sysfs device attribute defines and structs * --------------------------------------------------------------------- */ /* Voltages 0-7 */ #define SENSOR_DEVICE_ATTR_IN(ix) … SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); SENSOR_DEVICE_ATTR_IN(…); /* Temperatures 1-3 */ #define SENSOR_DEVICE_ATTR_TEMP(ix) … SENSOR_DEVICE_ATTR_TEMP(…); SENSOR_DEVICE_ATTR_TEMP(…); SENSOR_DEVICE_ATTR_TEMP(…); /* Zones 1-3 */ #define SENSOR_DEVICE_ATTR_ZONE(ix) … SENSOR_DEVICE_ATTR_ZONE(…); SENSOR_DEVICE_ATTR_ZONE(…); SENSOR_DEVICE_ATTR_ZONE(…); /* Fans 1-4 */ #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) … SENSOR_DEVICE_ATTR_FAN_1TO4(…); SENSOR_DEVICE_ATTR_FAN_1TO4(…); SENSOR_DEVICE_ATTR_FAN_1TO4(…); SENSOR_DEVICE_ATTR_FAN_1TO4(…); /* Fans 5-6 */ #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) … SENSOR_DEVICE_ATTR_FAN_5TO6(…); SENSOR_DEVICE_ATTR_FAN_5TO6(…); /* PWMs 1-3 */ #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) … SENSOR_DEVICE_ATTR_PWM_1TO3(…); SENSOR_DEVICE_ATTR_PWM_1TO3(…); SENSOR_DEVICE_ATTR_PWM_1TO3(…); /* PWMs 5-6 */ #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) … SENSOR_DEVICE_ATTR_PWM_5TO6(…); SENSOR_DEVICE_ATTR_PWM_5TO6(…); /* Misc */ static DEVICE_ATTR_RW(vrm); static DEVICE_ATTR_RO(cpu0_vid); static DEVICE_ATTR_RO(name); /* for ISA devices */ /* * This struct holds all the attributes that are always present and need to be * created unconditionally. The attributes that need modification of their * permissions are created read-only and write permissions are added or removed * on the fly when required */ static struct attribute *dme1737_attr[] = …; static const struct attribute_group dme1737_group = …; /* * The following struct holds temp offset attributes, which are not available * in all chips. The following chips support them: * DME1737, SCH311x */ static struct attribute *dme1737_temp_offset_attr[] = …; static const struct attribute_group dme1737_temp_offset_group = …; /* * The following struct holds VID related attributes, which are not available * in all chips. The following chips support them: * DME1737 */ static struct attribute *dme1737_vid_attr[] = …; static const struct attribute_group dme1737_vid_group = …; /* * The following struct holds temp zone 3 related attributes, which are not * available in all chips. The following chips support them: * DME1737, SCH311x, SCH5027 */ static struct attribute *dme1737_zone3_attr[] = …; static const struct attribute_group dme1737_zone3_group = …; /* * The following struct holds temp zone hysteresis related attributes, which * are not available in all chips. The following chips support them: * DME1737, SCH311x */ static struct attribute *dme1737_zone_hyst_attr[] = …; static const struct attribute_group dme1737_zone_hyst_group = …; /* * The following struct holds voltage in7 related attributes, which * are not available in all chips. The following chips support them: * SCH5127 */ static struct attribute *dme1737_in7_attr[] = …; static const struct attribute_group dme1737_in7_group = …; /* * The following structs hold the PWM attributes, some of which are optional. * Their creation depends on the chip configuration which is determined during * module load. */ static struct attribute *dme1737_pwm1_attr[] = …; static struct attribute *dme1737_pwm2_attr[] = …; static struct attribute *dme1737_pwm3_attr[] = …; static struct attribute *dme1737_pwm5_attr[] = …; static struct attribute *dme1737_pwm6_attr[] = …; static const struct attribute_group dme1737_pwm_group[] = …; /* * The following struct holds auto PWM min attributes, which are not available * in all chips. Their creation depends on the chip type which is determined * during module load. */ static struct attribute *dme1737_auto_pwm_min_attr[] = …; /* * The following structs hold the fan attributes, some of which are optional. * Their creation depends on the chip configuration which is determined during * module load. */ static struct attribute *dme1737_fan1_attr[] = …; static struct attribute *dme1737_fan2_attr[] = …; static struct attribute *dme1737_fan3_attr[] = …; static struct attribute *dme1737_fan4_attr[] = …; static struct attribute *dme1737_fan5_attr[] = …; static struct attribute *dme1737_fan6_attr[] = …; static const struct attribute_group dme1737_fan_group[] = …; /* * The permissions of the following zone attributes are changed to read- * writeable if the chip is *not* locked. Otherwise they stay read-only. */ static struct attribute *dme1737_zone_chmod_attr[] = …; static const struct attribute_group dme1737_zone_chmod_group = …; /* * The permissions of the following zone 3 attributes are changed to read- * writeable if the chip is *not* locked. Otherwise they stay read-only. */ static struct attribute *dme1737_zone3_chmod_attr[] = …; static const struct attribute_group dme1737_zone3_chmod_group = …; /* * The permissions of the following PWM attributes are changed to read- * writeable if the chip is *not* locked and the respective PWM is available. * Otherwise they stay read-only. */ static struct attribute *dme1737_pwm1_chmod_attr[] = …; static struct attribute *dme1737_pwm2_chmod_attr[] = …; static struct attribute *dme1737_pwm3_chmod_attr[] = …; static struct attribute *dme1737_pwm5_chmod_attr[] = …; static struct attribute *dme1737_pwm6_chmod_attr[] = …; static const struct attribute_group dme1737_pwm_chmod_group[] = …; /* * Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the * chip is not locked. Otherwise they are read-only. */ static struct attribute *dme1737_pwm_chmod_attr[] = …; /* --------------------------------------------------------------------- * Super-IO functions * --------------------------------------------------------------------- */ static inline void dme1737_sio_enter(int sio_cip) { … } static inline void dme1737_sio_exit(int sio_cip) { … } static inline int dme1737_sio_inb(int sio_cip, int reg) { … } static inline void dme1737_sio_outb(int sio_cip, int reg, int val) { … } /* --------------------------------------------------------------------- * Device initialization * --------------------------------------------------------------------- */ static int dme1737_i2c_get_features(int, struct dme1737_data*); static void dme1737_chmod_file(struct device *dev, struct attribute *attr, umode_t mode) { … } static void dme1737_chmod_group(struct device *dev, const struct attribute_group *group, umode_t mode) { … } static void dme1737_remove_files(struct device *dev) { … } static int dme1737_create_files(struct device *dev) { … } static int dme1737_init_device(struct device *dev) { … } /* --------------------------------------------------------------------- * I2C device detection and registration * --------------------------------------------------------------------- */ static struct i2c_driver dme1737_i2c_driver; static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) { … } /* Return 0 if detection is successful, -ENODEV otherwise */ static int dme1737_i2c_detect(struct i2c_client *client, struct i2c_board_info *info) { … } static int dme1737_i2c_probe(struct i2c_client *client) { … } static void dme1737_i2c_remove(struct i2c_client *client) { … } static const struct i2c_device_id dme1737_id[] = …; MODULE_DEVICE_TABLE(i2c, dme1737_id); static struct i2c_driver dme1737_i2c_driver = …; /* --------------------------------------------------------------------- * ISA device detection and registration * --------------------------------------------------------------------- */ static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) { … } static int __init dme1737_isa_device_add(unsigned short addr) { … } static int dme1737_isa_probe(struct platform_device *pdev) { … } static void dme1737_isa_remove(struct platform_device *pdev) { … } static struct platform_driver dme1737_isa_driver = …; /* --------------------------------------------------------------------- * Module initialization and cleanup * --------------------------------------------------------------------- */ static int __init dme1737_init(void) { … } static void __exit dme1737_exit(void) { … } MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; module_init(…) …; module_exit(dme1737_exit);
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