#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <asm/amd_nb.h>
#include <asm/processor.h>
MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;
static bool force;
module_param(force, bool, 0444);
MODULE_PARM_DESC(…) …;
static DEFINE_MUTEX(nb_smu_ind_mutex);
#ifndef PCI_DEVICE_ID_AMD_15H_M70H_NB_F3
#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 …
#endif
#define CPUID_PKGTYPE_MASK …
#define CPUID_PKGTYPE_F …
#define CPUID_PKGTYPE_AM2R2_AM3 …
#define REG_DCT0_CONFIG_HIGH …
#define DDR3_MODE …
#define REG_HARDWARE_THERMAL_CONTROL …
#define HTC_ENABLE …
#define REG_REPORTED_TEMPERATURE …
#define REG_NORTHBRIDGE_CAPABILITIES …
#define NB_CAP_HTC …
#define F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET …
#define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET …
#define ZEN_REPORTED_TEMP_CTRL_BASE …
#define ZEN_CCD_TEMP(offset, x) …
#define ZEN_CCD_TEMP_VALID …
#define ZEN_CCD_TEMP_MASK …
#define ZEN_CUR_TEMP_SHIFT …
#define ZEN_CUR_TEMP_RANGE_SEL_MASK …
#define ZEN_CUR_TEMP_TJ_SEL_MASK …
#define AMD_I3255_STR …
struct k10temp_data { … };
#define TCTL_BIT …
#define TDIE_BIT …
#define TCCD_BIT(x) …
#define HAVE_TEMP(d, channel) …
struct tctl_offset { … };
static const struct tctl_offset tctl_offset_table[] = …;
static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval)
{ … }
static void read_tempreg_pci(struct pci_dev *pdev, u32 *regval)
{ … }
static void amd_nb_index_read(struct pci_dev *pdev, unsigned int devfn,
unsigned int base, int offset, u32 *val)
{ … }
static void read_htcreg_nb_f15(struct pci_dev *pdev, u32 *regval)
{ … }
static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval)
{ … }
static void read_tempreg_nb_zen(struct pci_dev *pdev, u32 *regval)
{ … }
static int read_ccd_temp_reg(struct k10temp_data *data, int ccd, u32 *regval)
{ … }
static long get_raw_temp(struct k10temp_data *data)
{ … }
static const char *k10temp_temp_label[] = …;
static int k10temp_read_labels(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{ … }
static int k10temp_read_temp(struct device *dev, u32 attr, int channel,
long *val)
{ … }
static int k10temp_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{ … }
static umode_t k10temp_is_visible(const void *drvdata,
enum hwmon_sensor_types type,
u32 attr, int channel)
{ … }
static bool has_erratum_319(struct pci_dev *pdev)
{ … }
static const struct hwmon_channel_info * const k10temp_info[] = …;
static const struct hwmon_ops k10temp_hwmon_ops = …;
static const struct hwmon_chip_info k10temp_chip_info = …;
static void k10temp_get_ccd_support(struct k10temp_data *data, int limit)
{ … }
static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{ … }
static const struct pci_device_id k10temp_id_table[] = …;
MODULE_DEVICE_TABLE(pci, k10temp_id_table);
static struct pci_driver k10temp_driver = …;
module_pci_driver(…) …;