/* SPDX-License-Identifier: GPL-2.0+ */ /* * drivers/watchdog/at91sam9_wdt.h * * Copyright (C) 2007 Andrew Victor * Copyright (C) 2007 Atmel Corporation. * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries * * Watchdog Timer (WDT) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. * Based on SAM9X60 datasheet. * */ #ifndef AT91_WDT_H #define AT91_WDT_H #include <linux/bits.h> #define AT91_WDT_CR … #define AT91_WDT_WDRSTT … #define AT91_WDT_KEY … #define AT91_WDT_MR … #define AT91_WDT_WDV … #define AT91_WDT_SET_WDV(x) … #define AT91_SAM9X60_PERIODRST … #define AT91_SAM9X60_RPTHRST … #define AT91_WDT_WDFIEN … #define AT91_SAM9X60_WDDIS … #define AT91_WDT_WDRSTEN … #define AT91_WDT_WDRPROC … #define AT91_WDT_WDDIS … #define AT91_WDT_WDD … #define AT91_WDT_SET_WDD(x) … #define AT91_WDT_WDDBGHLT … #define AT91_WDT_WDIDLEHLT … #define AT91_WDT_SR … #define AT91_WDT_WDUNF … #define AT91_WDT_WDERR … /* Watchdog Timer Value Register */ #define AT91_SAM9X60_VR … /* Watchdog Window Level Register */ #define AT91_SAM9X60_WLR … /* Watchdog Period Value */ #define AT91_SAM9X60_COUNTER … #define AT91_SAM9X60_SET_COUNTER(x) … /* Interrupt Enable Register */ #define AT91_SAM9X60_IER … /* Period Interrupt Enable */ #define AT91_SAM9X60_PERINT … /* Interrupt Disable Register */ #define AT91_SAM9X60_IDR … /* Interrupt Status Register */ #define AT91_SAM9X60_ISR … #endif
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