/* SPDX-License-Identifier: GPL-2.0-only */ /** * Marvell BT-over-SDIO driver: SDIO interface related definitions * * Copyright (C) 2009, Marvell International Ltd. **/ #define SDIO_HEADER_LEN … /* SD block size can not bigger than 64 due to buf size limit in firmware */ /* define SD block size for data Tx/Rx */ #define SDIO_BLOCK_SIZE … /* Number of blocks for firmware transfer */ #define FIRMWARE_TRANSFER_NBLOCK … /* This is for firmware specific length */ #define FW_EXTRA_LEN … #define MRVDRV_SIZE_OF_CMD_BUFFER … #define MRVDRV_BT_RX_PACKET_BUFFER_SIZE … #define ALLOC_BUF_SIZE … /* The number of times to try when polling for status */ #define MAX_POLL_TRIES … /* Max retry number of CMD53 write */ #define MAX_WRITE_IOMEM_RETRY … /* register bitmasks */ #define HOST_POWER_UP … #define HOST_CMD53_FIN … #define HIM_DISABLE … #define HIM_ENABLE … #define UP_LD_HOST_INT_STATUS … #define DN_LD_HOST_INT_STATUS … #define DN_LD_CARD_RDY … #define CARD_IO_READY … #define FIRMWARE_READY … struct btmrvl_plt_wake_cfg { … }; struct btmrvl_sdio_card_reg { … }; struct btmrvl_sdio_card { … }; struct btmrvl_sdio_device { … }; /* Platform specific DMA alignment */ #define BTSDIO_DMA_ALIGN … /* Macros for Data Alignment : size */ #define ALIGN_SZ(p, a) … /* Macros for Data Alignment : address */ #define ALIGN_ADDR(p, a) …
Codebase Browser
linux