linux/include/dt-bindings/clock/bt1-ccu.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
 *
 * Baikal-T1 CCU clock indices
 */
#ifndef __DT_BINDINGS_CLOCK_BT1_CCU_H
#define __DT_BINDINGS_CLOCK_BT1_CCU_H

#define CCU_CPU_PLL …
#define CCU_SATA_PLL …
#define CCU_DDR_PLL …
#define CCU_PCIE_PLL …
#define CCU_ETH_PLL …

#define CCU_AXI_MAIN_CLK …
#define CCU_AXI_DDR_CLK …
#define CCU_AXI_SATA_CLK …
#define CCU_AXI_GMAC0_CLK …
#define CCU_AXI_GMAC1_CLK …
#define CCU_AXI_XGMAC_CLK …
#define CCU_AXI_PCIE_M_CLK …
#define CCU_AXI_PCIE_S_CLK …
#define CCU_AXI_USB_CLK …
#define CCU_AXI_HWA_CLK …
#define CCU_AXI_SRAM_CLK …

#define CCU_SYS_SATA_REF_CLK …
#define CCU_SYS_APB_CLK …
#define CCU_SYS_GMAC0_TX_CLK …
#define CCU_SYS_GMAC0_PTP_CLK …
#define CCU_SYS_GMAC1_TX_CLK …
#define CCU_SYS_GMAC1_PTP_CLK …
#define CCU_SYS_XGMAC_REF_CLK …
#define CCU_SYS_XGMAC_PTP_CLK …
#define CCU_SYS_USB_CLK …
#define CCU_SYS_PVT_CLK …
#define CCU_SYS_HWA_CLK …
#define CCU_SYS_UART_CLK …
#define CCU_SYS_I2C1_CLK …
#define CCU_SYS_I2C2_CLK …
#define CCU_SYS_GPIO_CLK …
#define CCU_SYS_TIMER0_CLK …
#define CCU_SYS_TIMER1_CLK …
#define CCU_SYS_TIMER2_CLK …
#define CCU_SYS_WDT_CLK …

#endif /* __DT_BINDINGS_CLOCK_BT1_CCU_H */