// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC * * Authors: * Serge Semin <[email protected]> * Dmitry Dunaev <[email protected]> * * Baikal-T1 CCU Dividers clock driver */ #define pr_fmt(fmt) … #include <linux/kernel.h> #include <linux/platform_device.h> #include <linux/printk.h> #include <linux/slab.h> #include <linux/clk-provider.h> #include <linux/reset-controller.h> #include <linux/mfd/syscon.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/ioport.h> #include <linux/regmap.h> #include <dt-bindings/clock/bt1-ccu.h> #include "ccu-div.h" #include "ccu-rst.h" #define CCU_AXI_MAIN_BASE … #define CCU_AXI_DDR_BASE … #define CCU_AXI_SATA_BASE … #define CCU_AXI_GMAC0_BASE … #define CCU_AXI_GMAC1_BASE … #define CCU_AXI_XGMAC_BASE … #define CCU_AXI_PCIE_M_BASE … #define CCU_AXI_PCIE_S_BASE … #define CCU_AXI_USB_BASE … #define CCU_AXI_HWA_BASE … #define CCU_AXI_SRAM_BASE … #define CCU_SYS_SATA_REF_BASE … #define CCU_SYS_APB_BASE … #define CCU_SYS_GMAC0_BASE … #define CCU_SYS_GMAC1_BASE … #define CCU_SYS_XGMAC_BASE … #define CCU_SYS_USB_BASE … #define CCU_SYS_PVT_BASE … #define CCU_SYS_HWA_BASE … #define CCU_SYS_UART_BASE … #define CCU_SYS_TIMER0_BASE … #define CCU_SYS_TIMER1_BASE … #define CCU_SYS_TIMER2_BASE … #define CCU_SYS_WDT_BASE … #define CCU_DIV_VAR_INFO(_id, _name, _pname, _base, _width, _flags, _features) … #define CCU_DIV_GATE_INFO(_id, _name, _pname, _base, _divider) … #define CCU_DIV_BUF_INFO(_id, _name, _pname, _base, _flags) … #define CCU_DIV_FIXED_INFO(_id, _name, _pname, _divider) … struct ccu_div_info { … }; struct ccu_div_data { … }; /* * AXI Main Interconnect (axi_main_clk) and DDR AXI-bus (axi_ddr_clk) clocks * must be left enabled in any case, since former one is responsible for * clocking a bus between CPU cores and the rest of the SoC components, while * the later is clocking the AXI-bus between DDR controller and the Main * Interconnect. So should any of these clocks get to be disabled, the system * will literally stop working. That's why we marked them as critical. */ static const struct ccu_div_info axi_info[] = …; /* * APB-bus clock is marked as critical since it's a main communication bus * for the SoC devices registers IO-operations. */ static const struct ccu_div_info sys_info[] = …; static struct ccu_div_data *axi_data; static struct ccu_div_data *sys_data; static void ccu_div_set_data(struct ccu_div_data *data) { … } static struct ccu_div_data *ccu_div_get_data(struct device_node *np) { … } static struct ccu_div *ccu_div_find_desc(struct ccu_div_data *data, unsigned int clk_id) { … } static struct ccu_div_data *ccu_div_create_data(struct device_node *np) { … } static void ccu_div_free_data(struct ccu_div_data *data) { … } static int ccu_div_find_sys_regs(struct ccu_div_data *data) { … } static struct clk_hw *ccu_div_of_clk_hw_get(struct of_phandle_args *clkspec, void *priv) { … } static int ccu_div_clk_register(struct ccu_div_data *data, bool defer) { … } static void ccu_div_clk_unregister(struct ccu_div_data *data, bool defer) { … } static int ccu_div_of_register(struct ccu_div_data *data) { … } static int ccu_div_rst_register(struct ccu_div_data *data) { … } static int ccu_div_probe(struct platform_device *pdev) { … } static const struct of_device_id ccu_div_of_match[] = …; static struct platform_driver ccu_div_driver = …; builtin_platform_driver(…) …; static __init void ccu_div_init(struct device_node *np) { … } CLK_OF_DECLARE_DRIVER(ccu_axi, "baikal,bt1-ccu-axi", ccu_div_init); CLK_OF_DECLARE_DRIVER(ccu_sys, "baikal,bt1-ccu-sys", ccu_div_init);
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