/* * Intel 82975X Memory Controller kernel module * (C) 2007 aCarLab (India) Pvt. Ltd. (http://acarlab.com) * (C) 2007 jetzbroadband (http://jetzbroadband.com) * This file may be distributed under the terms of the * GNU General Public License. * * Written by Arvind R. * Copied from i82875p_edac.c source: */ #include <linux/module.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/pci_ids.h> #include <linux/edac.h> #include "edac_module.h" #define EDAC_MOD_STR … #define i82975x_printk(level, fmt, arg...) … #define i82975x_mc_printk(mci, level, fmt, arg...) … #ifndef PCI_DEVICE_ID_INTEL_82975_0 #define PCI_DEVICE_ID_INTEL_82975_0 … #endif /* PCI_DEVICE_ID_INTEL_82975_0 */ #define I82975X_NR_DIMMS … #define I82975X_NR_CSROWS(nr_chans) … /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */ #define I82975X_EAP … #define I82975X_DERRSYN … #define I82975X_DES … #define I82975X_ERRSTS … /* Error Reporting is supported by 3 mechanisms: 1. DMI SERR generation ( ERRCMD ) 2. SMI DMI generation ( SMICMD ) 3. SCI DMI generation ( SCICMD ) NOTE: Only ONE of the three must be enabled */ #define I82975X_ERRCMD … #define I82975X_SMICMD … #define I82975X_SCICMD … #define I82975X_XEAP … #define I82975X_MCHBAR … /* NOTE: Following addresses have to indexed using MCHBAR offset (44h, 32b) */ /* Intel 82975x memory mapped register space */ #define I82975X_DRB_SHIFT … #define I82975X_DRB … #define I82975X_DRB_CH0R0 … #define I82975X_DRB_CH0R1 … #define I82975X_DRB_CH0R2 … #define I82975X_DRB_CH0R3 … #define I82975X_DRB_CH1R0 … #define I82975X_DRB_CH1R1 … #define I82975X_DRB_CH1R2 … #define I82975X_DRB_CH1R3 … #define I82975X_DRA … #define I82975X_DRA_CH0R01 … #define I82975X_DRA_CH0R23 … #define I82975X_DRA_CH1R01 … #define I82975X_DRA_CH1R23 … #define I82975X_BNKARC … #define I82975X_C0BNKARC … #define I82975X_C1BNKARC … #define I82975X_DRC … #define I82975X_DRC_CH0M0 … #define I82975X_DRC_CH1M0 … #define I82975X_DRC_M1 … #define I82975X_DRC_CH0M1 … #define I82975X_DRC_CH1M1 … enum i82975x_chips { … }; struct i82975x_pvt { … }; struct i82975x_dev_info { … }; struct i82975x_error_info { … }; static const struct i82975x_dev_info i82975x_devs[] = …; static struct pci_dev *mci_pdev; /* init dev: in case that AGP code has * already registered driver */ static int i82975x_registered = …; static void i82975x_get_error_info(struct mem_ctl_info *mci, struct i82975x_error_info *info) { … } static int i82975x_process_error_info(struct mem_ctl_info *mci, struct i82975x_error_info *info, int handle_errors) { … } static void i82975x_check(struct mem_ctl_info *mci) { … } /* Return 1 if dual channel mode is active. Else return 0. */ static int dual_channel_active(void __iomem *mch_window) { … } static void i82975x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, void __iomem *mch_window) { … } /* #define i82975x_DEBUG_IOMEM */ #ifdef i82975x_DEBUG_IOMEM static void i82975x_print_dram_timings(void __iomem *mch_window) { /* * The register meanings are from Intel specs; * (shows 13-5-5-5 for 800-DDR2) * Asus P5W Bios reports 15-5-4-4 * What's your religion? */ static const int caslats[4] = { 5, 4, 3, 6 }; u32 dtreg[2]; dtreg[0] = readl(mch_window + 0x114); dtreg[1] = readl(mch_window + 0x194); i82975x_printk(KERN_INFO, "DRAM Timings : Ch0 Ch1\n" " RAS Active Min = %d %d\n" " CAS latency = %d %d\n" " RAS to CAS = %d %d\n" " RAS precharge = %d %d\n", (dtreg[0] >> 19 ) & 0x0f, (dtreg[1] >> 19) & 0x0f, caslats[(dtreg[0] >> 8) & 0x03], caslats[(dtreg[1] >> 8) & 0x03], ((dtreg[0] >> 4) & 0x07) + 2, ((dtreg[1] >> 4) & 0x07) + 2, (dtreg[0] & 0x07) + 2, (dtreg[1] & 0x07) + 2 ); } #endif static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) { … } /* returns count (>= 0), or negative on error */ static int i82975x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { … } static void i82975x_remove_one(struct pci_dev *pdev) { … } static const struct pci_device_id i82975x_pci_tbl[] = …; MODULE_DEVICE_TABLE(pci, i82975x_pci_tbl); static struct pci_driver i82975x_driver = …; static int __init i82975x_init(void) { … } static void __exit i82975x_exit(void) { … } module_init(…) …; module_exit(i82975x_exit); MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; module_param(edac_op_state, int, 0444); MODULE_PARM_DESC(…) …;
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