linux/drivers/edac/e752x_edac.c

/*
 * Intel e752x Memory Controller kernel module
 * (C) 2004 Linux Networx (http://lnxi.com)
 * This file may be distributed under the terms of the
 * GNU General Public License.
 *
 * Implement support for the e7520, E7525, e7320 and i3100 memory controllers.
 *
 * Datasheets:
 *	https://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html
 *	ftp://download.intel.com/design/intarch/datashts/31345803.pdf
 *
 * Written by Tom Zimmerman
 *
 * Contributors:
 * 	Thayne Harbaugh at realmsys.com (?)
 * 	Wang Zhenyu at intel.com
 * 	Dave Jiang at mvista.com
 *
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/edac.h>
#include "edac_module.h"

#define EDAC_MOD_STR

static int report_non_memory_errors;
static int force_function_unhide;
static int sysbus_parity =;

static struct edac_pci_ctl_info *e752x_pci;

#define e752x_printk(level, fmt, arg...)

#define e752x_mc_printk(mci, level, fmt, arg...)

#ifndef PCI_DEVICE_ID_INTEL_7520_0
#define PCI_DEVICE_ID_INTEL_7520_0
#endif				/* PCI_DEVICE_ID_INTEL_7520_0      */

#ifndef PCI_DEVICE_ID_INTEL_7520_1_ERR
#define PCI_DEVICE_ID_INTEL_7520_1_ERR
#endif				/* PCI_DEVICE_ID_INTEL_7520_1_ERR  */

#ifndef PCI_DEVICE_ID_INTEL_7525_0
#define PCI_DEVICE_ID_INTEL_7525_0
#endif				/* PCI_DEVICE_ID_INTEL_7525_0      */

#ifndef PCI_DEVICE_ID_INTEL_7525_1_ERR
#define PCI_DEVICE_ID_INTEL_7525_1_ERR
#endif				/* PCI_DEVICE_ID_INTEL_7525_1_ERR  */

#ifndef PCI_DEVICE_ID_INTEL_7320_0
#define PCI_DEVICE_ID_INTEL_7320_0
#endif				/* PCI_DEVICE_ID_INTEL_7320_0 */

#ifndef PCI_DEVICE_ID_INTEL_7320_1_ERR
#define PCI_DEVICE_ID_INTEL_7320_1_ERR
#endif				/* PCI_DEVICE_ID_INTEL_7320_1_ERR */

#ifndef PCI_DEVICE_ID_INTEL_3100_0
#define PCI_DEVICE_ID_INTEL_3100_0
#endif				/* PCI_DEVICE_ID_INTEL_3100_0 */

#ifndef PCI_DEVICE_ID_INTEL_3100_1_ERR
#define PCI_DEVICE_ID_INTEL_3100_1_ERR
#endif				/* PCI_DEVICE_ID_INTEL_3100_1_ERR */

#define E752X_NR_CSROWS

/* E752X register addresses - device 0 function 0 */
#define E752X_MCHSCRB
					/*
					 * 6:5     Scrub Completion Count
					 * 3:2     Scrub Rate (i3100 only)
					 *      01=fast 10=normal
					 * 1:0     Scrub Mode enable
					 *      00=off 10=on
					 */
#define E752X_DRB
#define E752X_DRA
					/*
					 * 31:30   Device width row 7
					 *      01=x8 10=x4 11=x8 DDR2
					 * 27:26   Device width row 6
					 * 23:22   Device width row 5
					 * 19:20   Device width row 4
					 * 15:14   Device width row 3
					 * 11:10   Device width row 2
					 *  7:6    Device width row 1
					 *  3:2    Device width row 0
					 */
#define E752X_DRC
					/* FIXME:IS THIS RIGHT? */
					/*
					 * 22    Number channels 0=1,1=2
					 * 19:18 DRB Granularity 32/64MB
					 */
#define E752X_DRM
#define E752X_DDRCSR
					/*
					 * 14:12 1 single A, 2 single B, 3 dual
					 */
#define E752X_TOLM
#define E752X_REMAPBASE
#define E752X_REMAPLIMIT
#define E752X_REMAPOFFSET

/* E752X register addresses - device 0 function 1 */
#define E752X_FERR_GLOBAL
#define E752X_NERR_GLOBAL
#define E752X_HI_FERR
#define E752X_HI_NERR
#define E752X_HI_ERRMASK
#define E752X_HI_SMICMD
#define E752X_SYSBUS_FERR
#define E752X_SYSBUS_NERR
#define E752X_SYSBUS_ERRMASK
#define E752X_SYSBUS_SMICMD
#define E752X_BUF_FERR
#define E752X_BUF_NERR
#define E752X_BUF_ERRMASK
#define E752X_BUF_SMICMD
#define E752X_DRAM_FERR
#define E752X_DRAM_NERR
#define E752X_DRAM_ERRMASK
#define E752X_DRAM_SMICMD
#define E752X_DRAM_RETR_ADD
#define E752X_DRAM_SEC1_ADD
					/*     error address register (32b) */
					/*
					 * 31    Reserved
					 * 30:2  CE address (64 byte block 34:6
					 * 1     Reserved
					 * 0     HiLoCS
					 */
#define E752X_DRAM_SEC2_ADD
					/*     error address register (32b) */
					/*
					 * 31    Reserved
					 * 30:2  CE address (64 byte block 34:6)
					 * 1     Reserved
					 * 0     HiLoCS
					 */
#define E752X_DRAM_DED_ADD
					/*     error address register (32b) */
					/*
					 * 31    Reserved
					 * 30:2  CE address (64 byte block 34:6)
					 * 1     Reserved
					 * 0     HiLoCS
					 */
#define E752X_DRAM_SCRB_ADD
					/*     error address register (32b) */
					/*
					 * 31    Reserved
					 * 30:2  CE address (64 byte block 34:6
					 * 1     Reserved
					 * 0     HiLoCS
					 */
#define E752X_DRAM_SEC1_SYNDROME
					/*     error syndrome register (16b) */
#define E752X_DRAM_SEC2_SYNDROME
					/*     error syndrome register (16b) */
#define E752X_DEVPRES1

/* 3100 IMCH specific register addresses - device 0 function 1 */
#define I3100_NSI_FERR
#define I3100_NSI_NERR
#define I3100_NSI_SMICMD
#define I3100_NSI_EMASK

/* ICH5R register addresses - device 30 function 0 */
#define ICH5R_PCI_STAT
#define ICH5R_PCI_2ND_STAT
#define ICH5R_PCI_BRIDGE_CTL

enum e752x_chips {};

/*
 * Those chips Support single-rank and dual-rank memories only.
 *
 * On e752x chips, the odd rows are present only on dual-rank memories.
 * Dividing the rank by two will provide the dimm#
 *
 * i3100 MC has a different mapping: it supports only 4 ranks.
 *
 * The mapping is (from 1 to n):
 *	slot	   single-ranked	double-ranked
 *	dimm #1 -> rank #4		NA
 *	dimm #2 -> rank #3		NA
 *	dimm #3 -> rank #2		Ranks 2 and 3
 *	dimm #4 -> rank $1		Ranks 1 and 4
 *
 * FIXME: The current mapping for i3100 considers that it supports up to 8
 *	  ranks/chanel, but datasheet says that the MC supports only 4 ranks.
 */

struct e752x_pvt {};

struct e752x_dev_info {};

struct e752x_error_info {};

static const struct e752x_dev_info e752x_devs[] =;

/* Valid scrub rates for the e752x/3100 hardware memory scrubber. We
 * map the scrubbing bandwidth to a hardware register value. The 'set'
 * operation finds the 'matching or higher value'.  Note that scrubbing
 * on the e752x can only be enabled/disabled.  The 3100 supports
 * a normal and fast mode.
 */

#define SDRATE_EOT

struct scrubrate {};

/* Rate below assumes same performance as i3100 using PC3200 DDR2 in
 * normal mode.  e752x bridges don't support choosing normal or fast mode,
 * so the scrubbing bandwidth value isn't all that important - scrubbing is
 * either on or off.
 */
static const struct scrubrate scrubrates_e752x[] =;

/* Fast mode: 2 GByte PC3200 DDR2 scrubbed in 33s = 63161283 bytes/s
 * Normal mode: 125 (32000 / 256) times slower than fast mode.
 */
static const struct scrubrate scrubrates_i3100[] =;

static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
				unsigned long page)
{}

static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
			u32 sec1_add, u16 sec1_syndrome)
{}

static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
			u32 sec1_add, u16 sec1_syndrome, int *error_found,
			int handle_error)
{}

static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
			u32 ded_add, u32 scrb_add)
{}

static inline void process_ue(struct mem_ctl_info *mci, u16 error_one,
			u32 ded_add, u32 scrb_add, int *error_found,
			int handle_error)
{}

static inline void process_ue_no_info_wr(struct mem_ctl_info *mci,
					 int *error_found, int handle_error)
{}

static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,
				 u32 retry_add)
{}

static inline void process_ded_retry(struct mem_ctl_info *mci, u16 error,
				u32 retry_add, int *error_found,
				int handle_error)
{}

static inline void process_threshold_ce(struct mem_ctl_info *mci, u16 error,
					int *error_found, int handle_error)
{}

static char *global_message[11] =;

#define DRAM_ENTRY

static char *fatal_message[2] =;

static void do_global_error(int fatal, u32 errors)
{}

static inline void global_error(int fatal, u32 errors, int *error_found,
				int handle_error)
{}

static char *hub_message[7] =;

static void do_hub_error(int fatal, u8 errors)
{}

static inline void hub_error(int fatal, u8 errors, int *error_found,
			int handle_error)
{}

#define NSI_FATAL_MASK
#define NSI_NON_FATAL_MASK
#define NSI_ERR_MASK

static char *nsi_message[30] =;

static void do_nsi_error(int fatal, u32 errors)
{}

static inline void nsi_error(int fatal, u32 errors, int *error_found,
		int handle_error)
{}

static char *membuf_message[4] =;

static void do_membuf_error(u8 errors)
{}

static inline void membuf_error(u8 errors, int *error_found, int handle_error)
{}

static char *sysbus_message[10] =;

static void do_sysbus_error(int fatal, u32 errors)
{}

static inline void sysbus_error(int fatal, u32 errors, int *error_found,
				int handle_error)
{}

static void e752x_check_hub_interface(struct e752x_error_info *info,
				int *error_found, int handle_error)
{}

static void e752x_check_ns_interface(struct e752x_error_info *info,
				int *error_found, int handle_error)
{}

static void e752x_check_sysbus(struct e752x_error_info *info,
			int *error_found, int handle_error)
{}

static void e752x_check_membuf(struct e752x_error_info *info,
			int *error_found, int handle_error)
{}

static void e752x_check_dram(struct mem_ctl_info *mci,
			struct e752x_error_info *info, int *error_found,
			int handle_error)
{}

static void e752x_get_error_info(struct mem_ctl_info *mci,
				 struct e752x_error_info *info)
{}

static int e752x_process_error_info(struct mem_ctl_info *mci,
				struct e752x_error_info *info,
				int handle_errors)
{}

static void e752x_check(struct mem_ctl_info *mci)
{}

/* Program byte/sec bandwidth scrub rate to hardware */
static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 new_bw)
{}

/* Convert current scrub rate value into byte/sec bandwidth */
static int get_sdram_scrub_rate(struct mem_ctl_info *mci)
{}

/* Return 1 if dual channel mode is active.  Else return 0. */
static inline int dual_channel_active(u16 ddrcsr)
{}

/* Remap csrow index numbers if map_type is "reverse"
 */
static inline int remap_csrow_index(struct mem_ctl_info *mci, int index)
{}

static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
			u16 ddrcsr)
{}

static void e752x_init_mem_map_table(struct pci_dev *pdev,
				struct e752x_pvt *pvt)
{}

/* Return 0 on success or 1 on failure. */
static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
			struct e752x_pvt *pvt)
{}

/* Setup system bus parity mask register.
 * Sysbus parity supported on:
 * e7320/e7520/e7525 + Xeon
 */
static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
{}

static void e752x_init_error_reporting_regs(struct e752x_pvt *pvt)
{}

static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
{}

/* returns count (>= 0), or negative on error */
static int e752x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{}

static void e752x_remove_one(struct pci_dev *pdev)
{}

static const struct pci_device_id e752x_pci_tbl[] =;

MODULE_DEVICE_TABLE(pci, e752x_pci_tbl);

static struct pci_driver e752x_driver =;

static int __init e752x_init(void)
{}

static void __exit e752x_exit(void)
{}

module_init();
module_exit(e752x_exit);

MODULE_LICENSE();
MODULE_AUTHOR();
MODULE_DESCRIPTION();

module_param(force_function_unhide, int, 0444);
MODULE_PARM_DESC();

module_param(edac_op_state, int, 0444);
MODULE_PARM_DESC();

module_param(sysbus_parity, int, 0444);
MODULE_PARM_DESC();
module_param(report_non_memory_errors, int, 0644);
MODULE_PARM_DESC();