// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2010 Marvell International Ltd. * Zhangfei Gao <[email protected]> * Kevin Wang <[email protected]> * Mingwei Wang <[email protected]> * Philip Rakity <[email protected]> * Mark Brown <[email protected]> */ #include <linux/err.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/mmc/card.h> #include <linux/mmc/host.h> #include <linux/platform_data/pxa_sdhci.h> #include <linux/slab.h> #include <linux/delay.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/pm.h> #include <linux/pm_runtime.h> #include <linux/mbus.h> #include "sdhci.h" #include "sdhci-pltfm.h" #define PXAV3_RPM_DELAY_MS … #define SD_CLOCK_BURST_SIZE_SETUP … #define SDCLK_SEL … #define SDCLK_DELAY_SHIFT … #define SDCLK_DELAY_MASK … #define SD_CFG_FIFO_PARAM … #define SDCFG_GEN_PAD_CLK_ON … #define SDCFG_GEN_PAD_CLK_CNT_MASK … #define SDCFG_GEN_PAD_CLK_CNT_SHIFT … #define SD_SPI_MODE … #define SD_CE_ATA_1 … #define SD_CE_ATA_2 … #define SDCE_MISC_INT … #define SDCE_MISC_INT_EN … struct sdhci_pxa { … }; /* * These registers are relative to the second register region, for the * MBus bridge. */ #define SDHCI_WINDOW_CTRL(i) … #define SDHCI_WINDOW_BASE(i) … #define SDHCI_MAX_WIN_NUM … /* * Fields below belong to SDIO3 Configuration Register (third register * region for the Armada 38x flavor) */ #define SDIO3_CONF_CLK_INV … #define SDIO3_CONF_SD_FB_CLK … static int mv_conf_mbus_windows(struct platform_device *pdev, const struct mbus_dram_target_info *dram) { … } static int armada_38x_quirks(struct platform_device *pdev, struct sdhci_host *host) { … } static void pxav3_reset(struct sdhci_host *host, u8 mask) { … } #define MAX_WAIT_COUNT … static void pxav3_gen_init_74_clocks(struct sdhci_host *host, u8 power_mode) { … } static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) { … } static void pxav3_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd) { … } static const struct sdhci_ops pxav3_sdhci_ops = …; static const struct sdhci_pltfm_data sdhci_pxav3_pdata = …; #ifdef CONFIG_OF static const struct of_device_id sdhci_pxav3_of_match[] = …; MODULE_DEVICE_TABLE(of, sdhci_pxav3_of_match); static struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) { … } #else static inline struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) { return NULL; } #endif static int sdhci_pxav3_probe(struct platform_device *pdev) { … } static void sdhci_pxav3_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM_SLEEP static int sdhci_pxav3_suspend(struct device *dev) { … } static int sdhci_pxav3_resume(struct device *dev) { … } #endif #ifdef CONFIG_PM static int sdhci_pxav3_runtime_suspend(struct device *dev) { … } static int sdhci_pxav3_runtime_resume(struct device *dev) { … } #endif static const struct dev_pm_ops sdhci_pxav3_pmops = …; static struct platform_driver sdhci_pxav3_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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