linux/drivers/clk/imx/clk-divider-gate.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2018 NXP.
 *   Dong Aisheng <[email protected]>
 */

#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/slab.h>

#include "clk.h"

struct clk_divider_gate { … };

static inline struct clk_divider_gate *to_clk_divider_gate(struct clk_hw *hw)
{ … }

static unsigned long clk_divider_gate_recalc_rate_ro(struct clk_hw *hw,
						     unsigned long parent_rate)
{ … }

static unsigned long clk_divider_gate_recalc_rate(struct clk_hw *hw,
						  unsigned long parent_rate)
{ … }

static int clk_divider_determine_rate(struct clk_hw *hw,
				      struct clk_rate_request *req)
{ … }

static int clk_divider_gate_set_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long parent_rate)
{ … }

static int clk_divider_enable(struct clk_hw *hw)
{ … }

static void clk_divider_disable(struct clk_hw *hw)
{ … }

static int clk_divider_is_enabled(struct clk_hw *hw)
{ … }

static const struct clk_ops clk_divider_gate_ro_ops = …;

static const struct clk_ops clk_divider_gate_ops = …;

/*
 * NOTE: In order to reuse the most code from the common divider,
 * we also design our divider following the way that provids an extra
 * clk_divider_flags, however it's fixed to CLK_DIVIDER_ONE_BASED by
 * default as our HW is. Besides that it supports only CLK_DIVIDER_READ_ONLY
 * flag which can be specified by user flexibly.
 */
struct clk_hw *imx_clk_hw_divider_gate(const char *name, const char *parent_name,
				    unsigned long flags, void __iomem *reg,
				    u8 shift, u8 width, u8 clk_divider_flags,
				    const struct clk_div_table *table,
				    spinlock_t *lock)
{ … }