linux/drivers/clk/imx/clk-composite-8m.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2018 NXP
 */

#include <linux/clk-provider.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/io.h>
#include <linux/slab.h>

#include "clk.h"

#define PCG_PREDIV_SHIFT …
#define PCG_PREDIV_WIDTH …
#define PCG_PREDIV_MAX …

#define PCG_DIV_SHIFT …
#define PCG_CORE_DIV_WIDTH …
#define PCG_DIV_WIDTH …
#define PCG_DIV_MAX …

#define PCG_PCS_SHIFT …
#define PCG_PCS_MASK …

#define PCG_CGC_SHIFT …

static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk_hw *hw,
						unsigned long parent_rate)
{ … }

static int imx8m_clk_composite_compute_dividers(unsigned long rate,
						unsigned long parent_rate,
						int *prediv, int *postdiv)
{ … }

static long imx8m_clk_composite_divider_round_rate(struct clk_hw *hw,
						unsigned long rate,
						unsigned long *prate)
{ … }

static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
					unsigned long rate,
					unsigned long parent_rate)
{ … }

static int imx8m_divider_determine_rate(struct clk_hw *hw,
				      struct clk_rate_request *req)
{ … }

static const struct clk_ops imx8m_clk_composite_divider_ops = …;

static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)
{ … }

static int imx8m_clk_composite_mux_set_parent(struct clk_hw *hw, u8 index)
{ … }

static int
imx8m_clk_composite_mux_determine_rate(struct clk_hw *hw,
				       struct clk_rate_request *req)
{ … }


static const struct clk_ops imx8m_clk_composite_mux_ops = …;

struct clk_hw *__imx8m_clk_hw_composite(const char *name,
					const char * const *parent_names,
					int num_parents, void __iomem *reg,
					u32 composite_flags,
					unsigned long flags)
{ … }
EXPORT_SYMBOL_GPL(…);