linux/drivers/clk/imx/clk-pll14xx.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2017-2018 NXP.
 */

#define pr_fmt(fmt) …

#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/slab.h>
#include <linux/jiffies.h>

#include "clk.h"

#define GNRL_CTL …
#define DIV_CTL0 …
#define DIV_CTL1 …
#define LOCK_STATUS …
#define LOCK_SEL_MASK …
#define CLKE_MASK …
#define RST_MASK …
#define BYPASS_MASK …
#define MDIV_MASK …
#define PDIV_MASK …
#define SDIV_MASK …
#define KDIV_MASK …
#define KDIV_MIN …
#define KDIV_MAX …

#define LOCK_TIMEOUT_US …

struct clk_pll14xx { … };

#define to_clk_pll14xx(_hw) …

static const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = …;

static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = …;

struct imx_pll14xx_clk imx_1443x_pll = …;
EXPORT_SYMBOL_GPL(…);

struct imx_pll14xx_clk imx_1443x_dram_pll = …;
EXPORT_SYMBOL_GPL(…);

struct imx_pll14xx_clk imx_1416x_pll = …;
EXPORT_SYMBOL_GPL(…);

static const struct imx_pll14xx_rate_table *imx_get_pll_settings(
		struct clk_pll14xx *pll, unsigned long rate)
{ … }

static long pll14xx_calc_rate(struct clk_pll14xx *pll, int mdiv, int pdiv,
			      int sdiv, int kdiv, unsigned long prate)
{ … }

static long pll1443x_calc_kdiv(int mdiv, int pdiv, int sdiv,
		unsigned long rate, unsigned long prate)
{ … }

static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rate,
				      unsigned long prate, struct imx_pll14xx_rate_table *t)
{ … }

static long clk_pll1416x_round_rate(struct clk_hw *hw, unsigned long rate,
			unsigned long *prate)
{ … }

static long clk_pll1443x_round_rate(struct clk_hw *hw, unsigned long rate,
			unsigned long *prate)
{ … }

static unsigned long clk_pll14xx_recalc_rate(struct clk_hw *hw,
						  unsigned long parent_rate)
{ … }

static inline bool clk_pll14xx_mp_change(const struct imx_pll14xx_rate_table *rate,
					  u32 pll_div)
{ … }

static int clk_pll14xx_wait_lock(struct clk_pll14xx *pll)
{ … }

static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
				 unsigned long prate)
{ … }

static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate,
				 unsigned long prate)
{ … }

static int clk_pll14xx_prepare(struct clk_hw *hw)
{ … }

static int clk_pll14xx_is_prepared(struct clk_hw *hw)
{ … }

static void clk_pll14xx_unprepare(struct clk_hw *hw)
{ … }

static const struct clk_ops clk_pll1416x_ops = …;

static const struct clk_ops clk_pll1416x_min_ops = …;

static const struct clk_ops clk_pll1443x_ops = …;

struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
				const char *parent_name, void __iomem *base,
				const struct imx_pll14xx_clk *pll_clk)
{ … }
EXPORT_SYMBOL_GPL(…);