/* * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation. * All rights reserved. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef _QIB_COMMON_H #define _QIB_COMMON_H /* * This file contains defines, structures, etc. that are used * to communicate between kernel and user code. */ /* This is the IEEE-assigned OUI for QLogic Inc. QLogic_IB */ #define QIB_SRC_OUI_1 … #define QIB_SRC_OUI_2 … #define QIB_SRC_OUI_3 … /* version of protocol header (known to chip also). In the long run, * we should be able to generate and accept a range of version numbers; * for now we only accept one, and it's compiled in. */ #define IPS_PROTO_VERSION … /* * These are compile time constants that you may want to enable or disable * if you are trying to debug problems with code or performance. * QIB_VERBOSE_TRACING define as 1 if you want additional tracing in * fastpath code * QIB_TRACE_REGWRITES define as 1 if you want register writes to be * traced in fastpath code * _QIB_TRACING define as 0 if you want to remove all tracing in a * compilation unit */ /* * The value in the BTH QP field that QLogic_IB uses to differentiate * an qlogic_ib protocol IB packet vs standard IB transport * This it needs to be even (0x656b78), because the LSB is sometimes * used for the MSB of context. The change may cause a problem * interoperating with older software. */ #define QIB_KD_QP … /* * These are the status bits readable (in ascii form, 64bit value) * from the "status" sysfs file. For binary compatibility, values * must remain as is; removed states can be reused for different * purposes. */ #define QIB_STATUS_INITTED … /* Chip has been found and initted */ #define QIB_STATUS_CHIP_PRESENT … /* IB link is at ACTIVE, usable for data traffic */ #define QIB_STATUS_IB_READY … /* link is configured, LID, MTU, etc. have been set */ #define QIB_STATUS_IB_CONF … /* A Fatal hardware error has occurred. */ #define QIB_STATUS_HWERROR … /* * The list of usermode accessible registers. Also see Reg_* later in file. */ enum qib_ureg { … }; /* bit values for spi_runtime_flags */ #define QIB_RUNTIME_PCIE … #define QIB_RUNTIME_FORCE_WC_ORDER … #define QIB_RUNTIME_RCVHDR_COPY … #define QIB_RUNTIME_MASTER … #define QIB_RUNTIME_RCHK … #define QIB_RUNTIME_NODMA_RTAIL … #define QIB_RUNTIME_SPECIAL_TRIGGER … #define QIB_RUNTIME_SDMA … #define QIB_RUNTIME_FORCE_PIOAVAIL … #define QIB_RUNTIME_PIO_REGSWAPPED … #define QIB_RUNTIME_CTXT_MSB_IN_QP … #define QIB_RUNTIME_CTXT_REDIRECT … #define QIB_RUNTIME_HDRSUPP … /* * This structure is returned by qib_userinit() immediately after * open to get implementation-specific info, and info specific to this * instance. * * This struct must have explict pad fields where type sizes * may result in different alignments between 32 and 64 bit * programs, since the 64 bit * bit kernel requires the user code * to have matching offsets */ struct qib_base_info { … } __aligned(…); /* * This version number is given to the driver by the user code during * initialization in the spu_userversion field of qib_user_info, so * the driver can check for compatibility with user code. * * The major version changes when data structures * change in an incompatible way. The driver must be the same or higher * for initialization to succeed. In some cases, a higher version * driver will not interoperate with older software, and initialization * will return an error. */ #define QIB_USER_SWMAJOR … /* * Minor version differences are always compatible * a within a major version, however if user software is larger * than driver software, some new features and/or structure fields * may not be implemented; the user code must deal with this if it * cares, or it must abort after initialization reports the difference. */ #define QIB_USER_SWMINOR … #define QIB_USER_SWVERSION … #ifndef QIB_KERN_TYPE #define QIB_KERN_TYPE … #endif /* * Similarly, this is the kernel version going back to the user. It's * slightly different, in that we want to tell if the driver was built as * part of a QLogic release, or from the driver from openfabrics.org, * kernel.org, or a standard distribution, for support reasons. * The high bit is 0 for non-QLogic and 1 for QLogic-built/supplied. * * It's returned by the driver to the user code during initialization in the * spi_sw_version field of qib_base_info, so the user code can in turn * check for compatibility with the kernel. */ #define QIB_KERN_SWVERSION … /* * Define the driver version number. This is something that refers only * to the driver itself, not the software interfaces it supports. */ #define QIB_DRIVER_VERSION_BASE … /* create the final driver version string */ #ifdef QIB_IDSTR #define QIB_DRIVER_VERSION … #else #define QIB_DRIVER_VERSION … #endif /* * If the unit is specified via open, HCA choice is fixed. If port is * specified, it's also fixed. Otherwise we try to spread contexts * across ports and HCAs, using different algorithims. WITHIN is * the old default, prior to this mechanism. */ #define QIB_PORT_ALG_ACROSS … #define QIB_PORT_ALG_WITHIN … #define QIB_PORT_ALG_COUNT … /* * This structure is passed to qib_userinit() to tell the driver where * user code buffers are, sizes, etc. The offsets and sizes of the * fields must remain unchanged, for binary compatibility. It can * be extended, if userversion is changed so user code can tell, if needed */ struct qib_user_info { … } __aligned(…); /* User commands. */ /* 16 available, was: old set up userspace (for old user code) */ #define QIB_CMD_CTXT_INFO … #define QIB_CMD_RECV_CTRL … #define QIB_CMD_TID_UPDATE … #define QIB_CMD_TID_FREE … #define QIB_CMD_SET_PART_KEY … /* 22 available, was: return info on slave processes (for old user code) */ #define QIB_CMD_ASSIGN_CTXT … #define QIB_CMD_USER_INIT … #define QIB_CMD_UNUSED_1 … #define QIB_CMD_UNUSED_2 … #define QIB_CMD_PIOAVAILUPD … #define QIB_CMD_POLL_TYPE … #define QIB_CMD_ARMLAUNCH_CTRL … /* 30 is unused */ #define QIB_CMD_SDMA_INFLIGHT … #define QIB_CMD_SDMA_COMPLETE … /* 33 available, was a testing feature */ #define QIB_CMD_DISARM_BUFS … #define QIB_CMD_ACK_EVENT … #define QIB_CMD_CPUS_LIST … /* * QIB_CMD_ACK_EVENT obsoletes QIB_CMD_DISARM_BUFS, but we keep it for * compatibility with libraries from previous release. The ACK_EVENT * will take appropriate driver action (if any, just DISARM for now), * then clear the bits passed in as part of the mask. These bits are * in the first 64bit word at spi_sendbuf_status, and are passed to * the driver in the event_mask union as well. */ #define _QIB_EVENT_DISARM_BUFS_BIT … #define _QIB_EVENT_LINKDOWN_BIT … #define _QIB_EVENT_LID_CHANGE_BIT … #define _QIB_EVENT_LMC_CHANGE_BIT … #define _QIB_EVENT_SL2VL_CHANGE_BIT … #define _QIB_MAX_EVENT_BIT … #define QIB_EVENT_DISARM_BUFS_BIT … #define QIB_EVENT_LINKDOWN_BIT … #define QIB_EVENT_LID_CHANGE_BIT … #define QIB_EVENT_LMC_CHANGE_BIT … #define QIB_EVENT_SL2VL_CHANGE_BIT … /* * Poll types */ #define QIB_POLL_TYPE_ANYRCV … #define QIB_POLL_TYPE_URGENT … struct qib_ctxt_info { … }; struct qib_tid_info { … }; struct qib_cmd { … }; struct qib_iovec { … }; /* * Describes a single packet for send. Each packet can have one or more * buffers, but the total length (exclusive of IB headers) must be less * than the MTU, and if using the PIO method, entire packet length, * including IB headers, must be less than the qib_piosize value (words). * Use of this necessitates including sys/uio.h */ struct __qib_sendpkt { … }; /* * Diagnostics can send a packet by "writing" the following * structs to the diag data special file. * This allows a custom * pbc (+ static rate) qword, so that special modes and deliberate * changes to CRCs can be used. The elements were also re-ordered * for better alignment and to avoid padding issues. */ #define _DIAG_XPKT_VERS … struct qib_diag_xpkt { … }; /* * Data layout in I2C flash (for GUID, etc.) * All fields are little-endian binary unless otherwise stated */ #define QIB_FLASH_VERSION … struct qib_flash { … }; /* * These are the counters implemented in the chip, and are listed in order. * The InterCaps naming is taken straight from the chip spec. */ struct qlogic_ib_counters { … }; /* * The next set of defines are for packet headers, and chip register * and memory bits that are visible to and/or used by user-mode software. */ /* RcvHdrFlags bits */ #define QLOGIC_IB_RHF_LENGTH_MASK … #define QLOGIC_IB_RHF_LENGTH_SHIFT … #define QLOGIC_IB_RHF_RCVTYPE_MASK … #define QLOGIC_IB_RHF_RCVTYPE_SHIFT … #define QLOGIC_IB_RHF_EGRINDEX_MASK … #define QLOGIC_IB_RHF_EGRINDEX_SHIFT … #define QLOGIC_IB_RHF_SEQ_MASK … #define QLOGIC_IB_RHF_SEQ_SHIFT … #define QLOGIC_IB_RHF_HDRQ_OFFSET_MASK … #define QLOGIC_IB_RHF_HDRQ_OFFSET_SHIFT … #define QLOGIC_IB_RHF_H_ICRCERR … #define QLOGIC_IB_RHF_H_VCRCERR … #define QLOGIC_IB_RHF_H_PARITYERR … #define QLOGIC_IB_RHF_H_LENERR … #define QLOGIC_IB_RHF_H_MTUERR … #define QLOGIC_IB_RHF_H_IHDRERR … #define QLOGIC_IB_RHF_H_TIDERR … #define QLOGIC_IB_RHF_H_MKERR … #define QLOGIC_IB_RHF_H_IBERR … #define QLOGIC_IB_RHF_H_ERR_MASK … #define QLOGIC_IB_RHF_L_USE_EGR … #define QLOGIC_IB_RHF_L_SWA … #define QLOGIC_IB_RHF_L_SWB … /* qlogic_ib header fields */ #define QLOGIC_IB_I_VERS_MASK … #define QLOGIC_IB_I_VERS_SHIFT … #define QLOGIC_IB_I_CTXT_MASK … #define QLOGIC_IB_I_CTXT_SHIFT … #define QLOGIC_IB_I_TID_MASK … #define QLOGIC_IB_I_TID_SHIFT … #define QLOGIC_IB_I_OFFSET_MASK … #define QLOGIC_IB_I_OFFSET_SHIFT … /* K_PktFlags bits */ #define QLOGIC_IB_KPF_INTR … #define QLOGIC_IB_KPF_SUBCTXT_MASK … #define QLOGIC_IB_KPF_SUBCTXT_SHIFT … #define QLOGIC_IB_MAX_SUBCTXT … /* SendPIO per-buffer control */ #define QLOGIC_IB_SP_TEST … #define QLOGIC_IB_SP_TESTEBP … #define QLOGIC_IB_SP_TRIGGER_SHIFT … /* SendPIOAvail bits */ #define QLOGIC_IB_SENDPIOAVAIL_BUSY_SHIFT … #define QLOGIC_IB_SENDPIOAVAIL_CHECK_SHIFT … /* qlogic_ib header format */ struct qib_header { … }; /* * qlogic_ib user message header format. * This structure contains the first 4 fields common to all protocols * that employ qlogic_ib. */ struct qib_message_header { … }; /* sequence number bits for message */ qib_seqnum; /* qib receiving-dma tid-session-member */ struct qib_tid_session_member { … }; /* IB - LRH header consts */ #define QIB_LRH_GRH … #define QIB_LRH_BTH … /* misc. */ #define SIZE_OF_CRC … #define QIB_DEFAULT_P_KEY … #define QIB_PSN_MASK … #define QIB_EAGER_TID_ID … #define QIB_MULTICAST_QPN … /* Receive Header Queue: receive type (from qlogic_ib) */ #define RCVHQ_RCV_TYPE_EXPECTED … #define RCVHQ_RCV_TYPE_EAGER … #define RCVHQ_RCV_TYPE_NON_KD … #define RCVHQ_RCV_TYPE_ERROR … #define QIB_HEADER_QUEUE_WORDS … /* functions for extracting fields from rcvhdrq entries for the driver. */ static inline __u32 qib_hdrget_err_flags(const __le32 *rbuf) { … } static inline __u32 qib_hdrget_rcv_type(const __le32 *rbuf) { … } static inline __u32 qib_hdrget_length_in_bytes(const __le32 *rbuf) { … } static inline __u32 qib_hdrget_index(const __le32 *rbuf) { … } static inline __u32 qib_hdrget_seq(const __le32 *rbuf) { … } static inline __u32 qib_hdrget_offset(const __le32 *rbuf) { … } static inline __u32 qib_hdrget_use_egr_buf(const __le32 *rbuf) { … } #endif /* _QIB_COMMON_H */
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