linux/include/dt-bindings/clock/imx8mp-clock.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright 2019 NXP
 */

#ifndef __DT_BINDINGS_CLOCK_IMX8MP_H
#define __DT_BINDINGS_CLOCK_IMX8MP_H

#define IMX8MP_CLK_DUMMY
#define IMX8MP_CLK_32K
#define IMX8MP_CLK_24M
#define IMX8MP_OSC_HDMI_CLK
#define IMX8MP_CLK_EXT1
#define IMX8MP_CLK_EXT2
#define IMX8MP_CLK_EXT3
#define IMX8MP_CLK_EXT4
#define IMX8MP_AUDIO_PLL1_REF_SEL
#define IMX8MP_AUDIO_PLL2_REF_SEL
#define IMX8MP_VIDEO_PLL1_REF_SEL
#define IMX8MP_DRAM_PLL_REF_SEL
#define IMX8MP_GPU_PLL_REF_SEL
#define IMX8MP_VPU_PLL_REF_SEL
#define IMX8MP_ARM_PLL_REF_SEL
#define IMX8MP_SYS_PLL1_REF_SEL
#define IMX8MP_SYS_PLL2_REF_SEL
#define IMX8MP_SYS_PLL3_REF_SEL
#define IMX8MP_AUDIO_PLL1
#define IMX8MP_AUDIO_PLL2
#define IMX8MP_VIDEO_PLL1
#define IMX8MP_DRAM_PLL
#define IMX8MP_GPU_PLL
#define IMX8MP_VPU_PLL
#define IMX8MP_ARM_PLL
#define IMX8MP_SYS_PLL1
#define IMX8MP_SYS_PLL2
#define IMX8MP_SYS_PLL3
#define IMX8MP_AUDIO_PLL1_BYPASS
#define IMX8MP_AUDIO_PLL2_BYPASS
#define IMX8MP_VIDEO_PLL1_BYPASS
#define IMX8MP_DRAM_PLL_BYPASS
#define IMX8MP_GPU_PLL_BYPASS
#define IMX8MP_VPU_PLL_BYPASS
#define IMX8MP_ARM_PLL_BYPASS
#define IMX8MP_SYS_PLL1_BYPASS
#define IMX8MP_SYS_PLL2_BYPASS
#define IMX8MP_SYS_PLL3_BYPASS
#define IMX8MP_AUDIO_PLL1_OUT
#define IMX8MP_AUDIO_PLL2_OUT
#define IMX8MP_VIDEO_PLL1_OUT
#define IMX8MP_DRAM_PLL_OUT
#define IMX8MP_GPU_PLL_OUT
#define IMX8MP_VPU_PLL_OUT
#define IMX8MP_ARM_PLL_OUT
#define IMX8MP_SYS_PLL1_OUT
#define IMX8MP_SYS_PLL2_OUT
#define IMX8MP_SYS_PLL3_OUT
#define IMX8MP_SYS_PLL1_40M
#define IMX8MP_SYS_PLL1_80M
#define IMX8MP_SYS_PLL1_100M
#define IMX8MP_SYS_PLL1_133M
#define IMX8MP_SYS_PLL1_160M
#define IMX8MP_SYS_PLL1_200M
#define IMX8MP_SYS_PLL1_266M
#define IMX8MP_SYS_PLL1_400M
#define IMX8MP_SYS_PLL1_800M
#define IMX8MP_SYS_PLL2_50M
#define IMX8MP_SYS_PLL2_100M
#define IMX8MP_SYS_PLL2_125M
#define IMX8MP_SYS_PLL2_166M
#define IMX8MP_SYS_PLL2_200M
#define IMX8MP_SYS_PLL2_250M
#define IMX8MP_SYS_PLL2_333M
#define IMX8MP_SYS_PLL2_500M
#define IMX8MP_SYS_PLL2_1000M
#define IMX8MP_CLK_A53_SRC
#define IMX8MP_CLK_M7_SRC
#define IMX8MP_CLK_ML_SRC
#define IMX8MP_CLK_GPU3D_CORE_SRC
#define IMX8MP_CLK_GPU3D_SHADER_SRC
#define IMX8MP_CLK_GPU2D_SRC
#define IMX8MP_CLK_AUDIO_AXI_SRC
#define IMX8MP_CLK_HSIO_AXI_SRC
#define IMX8MP_CLK_MEDIA_ISP_SRC
#define IMX8MP_CLK_A53_CG
#define IMX8MP_CLK_M4_CG
#define IMX8MP_CLK_ML_CG
#define IMX8MP_CLK_GPU3D_CORE_CG
#define IMX8MP_CLK_GPU3D_SHADER_CG
#define IMX8MP_CLK_GPU2D_CG
#define IMX8MP_CLK_AUDIO_AXI_CG
#define IMX8MP_CLK_HSIO_AXI_CG
#define IMX8MP_CLK_MEDIA_ISP_CG
#define IMX8MP_CLK_A53_DIV
#define IMX8MP_CLK_M7_DIV
#define IMX8MP_CLK_ML_DIV
#define IMX8MP_CLK_GPU3D_CORE_DIV
#define IMX8MP_CLK_GPU3D_SHADER_DIV
#define IMX8MP_CLK_GPU2D_DIV
#define IMX8MP_CLK_AUDIO_AXI_DIV
#define IMX8MP_CLK_HSIO_AXI_DIV
#define IMX8MP_CLK_MEDIA_ISP_DIV
#define IMX8MP_CLK_MAIN_AXI
#define IMX8MP_CLK_ENET_AXI
#define IMX8MP_CLK_NAND_USDHC_BUS
#define IMX8MP_CLK_VPU_BUS
#define IMX8MP_CLK_MEDIA_AXI
#define IMX8MP_CLK_MEDIA_APB
#define IMX8MP_CLK_HDMI_APB
#define IMX8MP_CLK_HDMI_AXI
#define IMX8MP_CLK_GPU_AXI
#define IMX8MP_CLK_GPU_AHB
#define IMX8MP_CLK_NOC
#define IMX8MP_CLK_NOC_IO
#define IMX8MP_CLK_ML_AXI
#define IMX8MP_CLK_ML_AHB
#define IMX8MP_CLK_AHB
#define IMX8MP_CLK_AUDIO_AHB
#define IMX8MP_CLK_MIPI_DSI_ESC_RX
#define IMX8MP_CLK_IPG_ROOT
#define IMX8MP_CLK_DRAM_ALT
#define IMX8MP_CLK_DRAM_APB
#define IMX8MP_CLK_VPU_G1
#define IMX8MP_CLK_VPU_G2
#define IMX8MP_CLK_CAN1
#define IMX8MP_CLK_CAN2
#define IMX8MP_CLK_MEMREPAIR
#define IMX8MP_CLK_PCIE_AUX
#define IMX8MP_CLK_I2C5
#define IMX8MP_CLK_I2C6
#define IMX8MP_CLK_SAI1
#define IMX8MP_CLK_SAI2
#define IMX8MP_CLK_SAI3
/* #define IMX8MP_CLK_SAI4				126 */
#define IMX8MP_CLK_SAI5
#define IMX8MP_CLK_SAI6
#define IMX8MP_CLK_ENET_QOS
#define IMX8MP_CLK_ENET_QOS_TIMER
#define IMX8MP_CLK_ENET_REF
#define IMX8MP_CLK_ENET_TIMER
#define IMX8MP_CLK_ENET_PHY_REF
#define IMX8MP_CLK_NAND
#define IMX8MP_CLK_QSPI
#define IMX8MP_CLK_USDHC1
#define IMX8MP_CLK_USDHC2
#define IMX8MP_CLK_I2C1
#define IMX8MP_CLK_I2C2
#define IMX8MP_CLK_I2C3
#define IMX8MP_CLK_I2C4
#define IMX8MP_CLK_UART1
#define IMX8MP_CLK_UART2
#define IMX8MP_CLK_UART3
#define IMX8MP_CLK_UART4
#define IMX8MP_CLK_USB_CORE_REF
#define IMX8MP_CLK_USB_PHY_REF
#define IMX8MP_CLK_GIC
#define IMX8MP_CLK_ECSPI1
#define IMX8MP_CLK_ECSPI2
#define IMX8MP_CLK_PWM1
#define IMX8MP_CLK_PWM2
#define IMX8MP_CLK_PWM3
#define IMX8MP_CLK_PWM4
#define IMX8MP_CLK_GPT1
#define IMX8MP_CLK_GPT2
#define IMX8MP_CLK_GPT3
#define IMX8MP_CLK_GPT4
#define IMX8MP_CLK_GPT5
#define IMX8MP_CLK_GPT6
#define IMX8MP_CLK_TRACE
#define IMX8MP_CLK_WDOG
#define IMX8MP_CLK_WRCLK
#define IMX8MP_CLK_IPP_DO_CLKO1
#define IMX8MP_CLK_IPP_DO_CLKO2
#define IMX8MP_CLK_HDMI_FDCC_TST
#define IMX8MP_CLK_HDMI_24M
#define IMX8MP_CLK_HDMI_REF_266M
#define IMX8MP_CLK_USDHC3
#define IMX8MP_CLK_MEDIA_CAM1_PIX
#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF
#define IMX8MP_CLK_MEDIA_DISP1_PIX
#define IMX8MP_CLK_MEDIA_CAM2_PIX
#define IMX8MP_CLK_MEDIA_LDB
#define IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC
#define IMX8MP_CLK_MEDIA_MIPI_TEST_BYTE
#define IMX8MP_CLK_ECSPI3
#define IMX8MP_CLK_PDM
#define IMX8MP_CLK_VPU_VC8000E
#define IMX8MP_CLK_SAI7
#define IMX8MP_CLK_GPC_ROOT
#define IMX8MP_CLK_ANAMIX_ROOT
#define IMX8MP_CLK_CPU_ROOT
#define IMX8MP_CLK_CSU_ROOT
#define IMX8MP_CLK_DEBUG_ROOT
#define IMX8MP_CLK_DRAM1_ROOT
#define IMX8MP_CLK_ECSPI1_ROOT
#define IMX8MP_CLK_ECSPI2_ROOT
#define IMX8MP_CLK_ECSPI3_ROOT
#define IMX8MP_CLK_ENET1_ROOT
#define IMX8MP_CLK_GPIO1_ROOT
#define IMX8MP_CLK_GPIO2_ROOT
#define IMX8MP_CLK_GPIO3_ROOT
#define IMX8MP_CLK_GPIO4_ROOT
#define IMX8MP_CLK_GPIO5_ROOT
#define IMX8MP_CLK_GPT1_ROOT
#define IMX8MP_CLK_GPT2_ROOT
#define IMX8MP_CLK_GPT3_ROOT
#define IMX8MP_CLK_GPT4_ROOT
#define IMX8MP_CLK_GPT5_ROOT
#define IMX8MP_CLK_GPT6_ROOT
#define IMX8MP_CLK_HS_ROOT
#define IMX8MP_CLK_I2C1_ROOT
#define IMX8MP_CLK_I2C2_ROOT
#define IMX8MP_CLK_I2C3_ROOT
#define IMX8MP_CLK_I2C4_ROOT
#define IMX8MP_CLK_IOMUX_ROOT
#define IMX8MP_CLK_IPMUX1_ROOT
#define IMX8MP_CLK_IPMUX2_ROOT
#define IMX8MP_CLK_IPMUX3_ROOT
#define IMX8MP_CLK_MU_ROOT
#define IMX8MP_CLK_OCOTP_ROOT
#define IMX8MP_CLK_OCRAM_ROOT
#define IMX8MP_CLK_OCRAM_S_ROOT
#define IMX8MP_CLK_PCIE_ROOT
#define IMX8MP_CLK_PERFMON1_ROOT
#define IMX8MP_CLK_PERFMON2_ROOT
#define IMX8MP_CLK_PWM1_ROOT
#define IMX8MP_CLK_PWM2_ROOT
#define IMX8MP_CLK_PWM3_ROOT
#define IMX8MP_CLK_PWM4_ROOT
#define IMX8MP_CLK_QOS_ROOT
#define IMX8MP_CLK_QOS_ENET_ROOT
#define IMX8MP_CLK_QSPI_ROOT
#define IMX8MP_CLK_NAND_ROOT
#define IMX8MP_CLK_NAND_USDHC_BUS_RAWNAND_CLK
#define IMX8MP_CLK_RDC_ROOT
#define IMX8MP_CLK_ROM_ROOT
#define IMX8MP_CLK_I2C5_ROOT
#define IMX8MP_CLK_I2C6_ROOT
#define IMX8MP_CLK_CAN1_ROOT
#define IMX8MP_CLK_CAN2_ROOT
#define IMX8MP_CLK_SCTR_ROOT
#define IMX8MP_CLK_SDMA1_ROOT
#define IMX8MP_CLK_ENET_QOS_ROOT
#define IMX8MP_CLK_SEC_DEBUG_ROOT
#define IMX8MP_CLK_SEMA1_ROOT
#define IMX8MP_CLK_SEMA2_ROOT
#define IMX8MP_CLK_IRQ_STEER_ROOT
#define IMX8MP_CLK_SIM_ENET_ROOT
#define IMX8MP_CLK_SIM_M_ROOT
#define IMX8MP_CLK_SIM_MAIN_ROOT
#define IMX8MP_CLK_SIM_S_ROOT
#define IMX8MP_CLK_SIM_WAKEUP_ROOT
#define IMX8MP_CLK_GPU2D_ROOT
#define IMX8MP_CLK_GPU3D_ROOT
#define IMX8MP_CLK_SNVS_ROOT
#define IMX8MP_CLK_TRACE_ROOT
#define IMX8MP_CLK_UART1_ROOT
#define IMX8MP_CLK_UART2_ROOT
#define IMX8MP_CLK_UART3_ROOT
#define IMX8MP_CLK_UART4_ROOT
#define IMX8MP_CLK_USB_ROOT
#define IMX8MP_CLK_USB_PHY_ROOT
#define IMX8MP_CLK_USDHC1_ROOT
#define IMX8MP_CLK_USDHC2_ROOT
#define IMX8MP_CLK_WDOG1_ROOT
#define IMX8MP_CLK_WDOG2_ROOT
#define IMX8MP_CLK_WDOG3_ROOT
#define IMX8MP_CLK_VPU_G1_ROOT
#define IMX8MP_CLK_GPU_ROOT
#define IMX8MP_CLK_NOC_WRAPPER_ROOT
#define IMX8MP_CLK_VPU_VC8KE_ROOT
#define IMX8MP_CLK_VPU_G2_ROOT
#define IMX8MP_CLK_NPU_ROOT
#define IMX8MP_CLK_HSIO_ROOT
#define IMX8MP_CLK_MEDIA_APB_ROOT
#define IMX8MP_CLK_MEDIA_AXI_ROOT
#define IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT
#define IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT
#define IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT
#define IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT
#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT
#define IMX8MP_CLK_MEDIA_ISP_ROOT
#define IMX8MP_CLK_USDHC3_ROOT
#define IMX8MP_CLK_HDMI_ROOT
#define IMX8MP_CLK_XTAL_ROOT
#define IMX8MP_CLK_PLL_ROOT
#define IMX8MP_CLK_TSENSOR_ROOT
#define IMX8MP_CLK_VPU_ROOT
#define IMX8MP_CLK_MRPR_ROOT
#define IMX8MP_CLK_AUDIO_ROOT
#define IMX8MP_CLK_DRAM_ALT_ROOT
#define IMX8MP_CLK_DRAM_CORE
#define IMX8MP_CLK_ARM
#define IMX8MP_CLK_A53_CORE

#define IMX8MP_SYS_PLL1_40M_CG
#define IMX8MP_SYS_PLL1_80M_CG
#define IMX8MP_SYS_PLL1_100M_CG
#define IMX8MP_SYS_PLL1_133M_CG
#define IMX8MP_SYS_PLL1_160M_CG
#define IMX8MP_SYS_PLL1_200M_CG
#define IMX8MP_SYS_PLL1_266M_CG
#define IMX8MP_SYS_PLL1_400M_CG
#define IMX8MP_SYS_PLL2_50M_CG
#define IMX8MP_SYS_PLL2_100M_CG
#define IMX8MP_SYS_PLL2_125M_CG
#define IMX8MP_SYS_PLL2_166M_CG
#define IMX8MP_SYS_PLL2_200M_CG
#define IMX8MP_SYS_PLL2_250M_CG
#define IMX8MP_SYS_PLL2_333M_CG
#define IMX8MP_SYS_PLL2_500M_CG

#define IMX8MP_CLK_M7_CORE
#define IMX8MP_CLK_ML_CORE
#define IMX8MP_CLK_GPU3D_CORE
#define IMX8MP_CLK_GPU3D_SHADER_CORE
#define IMX8MP_CLK_GPU2D_CORE
#define IMX8MP_CLK_AUDIO_AXI
#define IMX8MP_CLK_HSIO_AXI
#define IMX8MP_CLK_MEDIA_ISP
#define IMX8MP_CLK_MEDIA_DISP2_PIX
#define IMX8MP_CLK_CLKOUT1_SEL
#define IMX8MP_CLK_CLKOUT1_DIV
#define IMX8MP_CLK_CLKOUT1
#define IMX8MP_CLK_CLKOUT2_SEL
#define IMX8MP_CLK_CLKOUT2_DIV
#define IMX8MP_CLK_CLKOUT2
#define IMX8MP_CLK_USB_SUSP
#define IMX8MP_CLK_AUDIO_AHB_ROOT
#define IMX8MP_CLK_AUDIO_AXI_ROOT
#define IMX8MP_CLK_SAI1_ROOT
#define IMX8MP_CLK_SAI2_ROOT
#define IMX8MP_CLK_SAI3_ROOT
#define IMX8MP_CLK_SAI5_ROOT
#define IMX8MP_CLK_SAI6_ROOT
#define IMX8MP_CLK_SAI7_ROOT
#define IMX8MP_CLK_PDM_ROOT
#define IMX8MP_CLK_MEDIA_LDB_ROOT
#define IMX8MP_CLK_END

#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3
#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3
#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3
#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3
#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3
#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3
#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG
#define IMX8MP_CLK_AUDIOMIX_PDM_IPG
#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT
#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT
#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT
#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT
#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT
#define IMX8MP_CLK_AUDIOMIX_EARC_IPG
#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG
#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG
#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT
#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT
#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT
#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT
#define IMX8MP_CLK_AUDIOMIX_EARC_PHY
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL
#define IMX8MP_CLK_AUDIOMIX_PDM_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT

#define IMX8MP_CLK_AUDIOMIX_END

#endif