#ifndef __DT_BINDINGS_CLOCK_IMX93_CLK_H
#define __DT_BINDINGS_CLOCK_IMX93_CLK_H
#define IMX93_CLK_DUMMY …
#define IMX93_CLK_24M …
#define IMX93_CLK_EXT1 …
#define IMX93_CLK_SYS_PLL_PFD0 …
#define IMX93_CLK_SYS_PLL_PFD0_DIV2 …
#define IMX93_CLK_SYS_PLL_PFD1 …
#define IMX93_CLK_SYS_PLL_PFD1_DIV2 …
#define IMX93_CLK_SYS_PLL_PFD2 …
#define IMX93_CLK_SYS_PLL_PFD2_DIV2 …
#define IMX93_CLK_AUDIO_PLL …
#define IMX93_CLK_VIDEO_PLL …
#define IMX93_CLK_A55_PERIPH …
#define IMX93_CLK_A55_MTR_BUS …
#define IMX93_CLK_A55 …
#define IMX93_CLK_M33 …
#define IMX93_CLK_BUS_WAKEUP …
#define IMX93_CLK_BUS_AON …
#define IMX93_CLK_WAKEUP_AXI …
#define IMX93_CLK_SWO_TRACE …
#define IMX93_CLK_M33_SYSTICK …
#define IMX93_CLK_FLEXIO1 …
#define IMX93_CLK_FLEXIO2 …
#define IMX93_CLK_LPTMR1 …
#define IMX93_CLK_LPTMR2 …
#define IMX93_CLK_TPM2 …
#define IMX93_CLK_TPM4 …
#define IMX93_CLK_TPM5 …
#define IMX93_CLK_TPM6 …
#define IMX93_CLK_FLEXSPI1 …
#define IMX93_CLK_CAN1 …
#define IMX93_CLK_CAN2 …
#define IMX93_CLK_LPUART1 …
#define IMX93_CLK_LPUART2 …
#define IMX93_CLK_LPUART3 …
#define IMX93_CLK_LPUART4 …
#define IMX93_CLK_LPUART5 …
#define IMX93_CLK_LPUART6 …
#define IMX93_CLK_LPUART7 …
#define IMX93_CLK_LPUART8 …
#define IMX93_CLK_LPI2C1 …
#define IMX93_CLK_LPI2C2 …
#define IMX93_CLK_LPI2C3 …
#define IMX93_CLK_LPI2C4 …
#define IMX93_CLK_LPI2C5 …
#define IMX93_CLK_LPI2C6 …
#define IMX93_CLK_LPI2C7 …
#define IMX93_CLK_LPI2C8 …
#define IMX93_CLK_LPSPI1 …
#define IMX93_CLK_LPSPI2 …
#define IMX93_CLK_LPSPI3 …
#define IMX93_CLK_LPSPI4 …
#define IMX93_CLK_LPSPI5 …
#define IMX93_CLK_LPSPI6 …
#define IMX93_CLK_LPSPI7 …
#define IMX93_CLK_LPSPI8 …
#define IMX93_CLK_I3C1 …
#define IMX93_CLK_I3C2 …
#define IMX93_CLK_USDHC1 …
#define IMX93_CLK_USDHC2 …
#define IMX93_CLK_USDHC3 …
#define IMX93_CLK_SAI1 …
#define IMX93_CLK_SAI2 …
#define IMX93_CLK_SAI3 …
#define IMX93_CLK_CCM_CKO1 …
#define IMX93_CLK_CCM_CKO2 …
#define IMX93_CLK_CCM_CKO3 …
#define IMX93_CLK_CCM_CKO4 …
#define IMX93_CLK_HSIO …
#define IMX93_CLK_HSIO_USB_TEST_60M …
#define IMX93_CLK_HSIO_ACSCAN_80M …
#define IMX93_CLK_HSIO_ACSCAN_480M …
#define IMX93_CLK_ML_APB …
#define IMX93_CLK_ML …
#define IMX93_CLK_MEDIA_AXI …
#define IMX93_CLK_MEDIA_APB …
#define IMX93_CLK_MEDIA_LDB …
#define IMX93_CLK_MEDIA_DISP_PIX …
#define IMX93_CLK_CAM_PIX …
#define IMX93_CLK_MIPI_TEST_BYTE …
#define IMX93_CLK_MIPI_PHY_CFG …
#define IMX93_CLK_ADC …
#define IMX93_CLK_PDM …
#define IMX93_CLK_TSTMR1 …
#define IMX93_CLK_TSTMR2 …
#define IMX93_CLK_MQS1 …
#define IMX93_CLK_MQS2 …
#define IMX93_CLK_AUDIO_XCVR …
#define IMX93_CLK_SPDIF …
#define IMX93_CLK_ENET …
#define IMX93_CLK_ENET_TIMER1 …
#define IMX93_CLK_ENET_TIMER2 …
#define IMX93_CLK_ENET_REF …
#define IMX93_CLK_ENET_REF_PHY …
#define IMX93_CLK_I3C1_SLOW …
#define IMX93_CLK_I3C2_SLOW …
#define IMX93_CLK_USB_PHY_BURUNIN …
#define IMX93_CLK_PAL_CAME_SCAN …
#define IMX93_CLK_A55_GATE …
#define IMX93_CLK_CM33_GATE …
#define IMX93_CLK_ADC1_GATE …
#define IMX93_CLK_WDOG1_GATE …
#define IMX93_CLK_WDOG2_GATE …
#define IMX93_CLK_WDOG3_GATE …
#define IMX93_CLK_WDOG4_GATE …
#define IMX93_CLK_WDOG5_GATE …
#define IMX93_CLK_SEMA1_GATE …
#define IMX93_CLK_SEMA2_GATE …
#define IMX93_CLK_MU_A_GATE …
#define IMX93_CLK_MU_B_GATE …
#define IMX93_CLK_EDMA1_GATE …
#define IMX93_CLK_EDMA2_GATE …
#define IMX93_CLK_FLEXSPI1_GATE …
#define IMX93_CLK_GPIO1_GATE …
#define IMX93_CLK_GPIO2_GATE …
#define IMX93_CLK_GPIO3_GATE …
#define IMX93_CLK_GPIO4_GATE …
#define IMX93_CLK_FLEXIO1_GATE …
#define IMX93_CLK_FLEXIO2_GATE …
#define IMX93_CLK_LPIT1_GATE …
#define IMX93_CLK_LPIT2_GATE …
#define IMX93_CLK_LPTMR1_GATE …
#define IMX93_CLK_LPTMR2_GATE …
#define IMX93_CLK_TPM1_GATE …
#define IMX93_CLK_TPM2_GATE …
#define IMX93_CLK_TPM3_GATE …
#define IMX93_CLK_TPM4_GATE …
#define IMX93_CLK_TPM5_GATE …
#define IMX93_CLK_TPM6_GATE …
#define IMX93_CLK_CAN1_GATE …
#define IMX93_CLK_CAN2_GATE …
#define IMX93_CLK_LPUART1_GATE …
#define IMX93_CLK_LPUART2_GATE …
#define IMX93_CLK_LPUART3_GATE …
#define IMX93_CLK_LPUART4_GATE …
#define IMX93_CLK_LPUART5_GATE …
#define IMX93_CLK_LPUART6_GATE …
#define IMX93_CLK_LPUART7_GATE …
#define IMX93_CLK_LPUART8_GATE …
#define IMX93_CLK_LPI2C1_GATE …
#define IMX93_CLK_LPI2C2_GATE …
#define IMX93_CLK_LPI2C3_GATE …
#define IMX93_CLK_LPI2C4_GATE …
#define IMX93_CLK_LPI2C5_GATE …
#define IMX93_CLK_LPI2C6_GATE …
#define IMX93_CLK_LPI2C7_GATE …
#define IMX93_CLK_LPI2C8_GATE …
#define IMX93_CLK_LPSPI1_GATE …
#define IMX93_CLK_LPSPI2_GATE …
#define IMX93_CLK_LPSPI3_GATE …
#define IMX93_CLK_LPSPI4_GATE …
#define IMX93_CLK_LPSPI5_GATE …
#define IMX93_CLK_LPSPI6_GATE …
#define IMX93_CLK_LPSPI7_GATE …
#define IMX93_CLK_LPSPI8_GATE …
#define IMX93_CLK_I3C1_GATE …
#define IMX93_CLK_I3C2_GATE …
#define IMX93_CLK_USDHC1_GATE …
#define IMX93_CLK_USDHC2_GATE …
#define IMX93_CLK_USDHC3_GATE …
#define IMX93_CLK_SAI1_GATE …
#define IMX93_CLK_SAI2_GATE …
#define IMX93_CLK_SAI3_GATE …
#define IMX93_CLK_MIPI_CSI_GATE …
#define IMX93_CLK_MIPI_DSI_GATE …
#define IMX93_CLK_LVDS_GATE …
#define IMX93_CLK_LCDIF_GATE …
#define IMX93_CLK_PXP_GATE …
#define IMX93_CLK_ISI_GATE …
#define IMX93_CLK_NIC_MEDIA_GATE …
#define IMX93_CLK_USB_CONTROLLER_GATE …
#define IMX93_CLK_USB_TEST_60M_GATE …
#define IMX93_CLK_HSIO_TROUT_24M_GATE …
#define IMX93_CLK_PDM_GATE …
#define IMX93_CLK_MQS1_GATE …
#define IMX93_CLK_MQS2_GATE …
#define IMX93_CLK_AUD_XCVR_GATE …
#define IMX93_CLK_SPDIF_GATE …
#define IMX93_CLK_HSIO_32K_GATE …
#define IMX93_CLK_ENET1_GATE …
#define IMX93_CLK_ENET_QOS_GATE …
#define IMX93_CLK_SYS_CNT_GATE …
#define IMX93_CLK_TSTMR1_GATE …
#define IMX93_CLK_TSTMR2_GATE …
#define IMX93_CLK_TMC_GATE …
#define IMX93_CLK_PMRO_GATE …
#define IMX93_CLK_32K …
#define IMX93_CLK_SAI1_IPG …
#define IMX93_CLK_SAI2_IPG …
#define IMX93_CLK_SAI3_IPG …
#define IMX93_CLK_MU1_A_GATE …
#define IMX93_CLK_MU1_B_GATE …
#define IMX93_CLK_MU2_A_GATE …
#define IMX93_CLK_MU2_B_GATE …
#define IMX93_CLK_NIC_AXI …
#define IMX93_CLK_ARM_PLL …
#define IMX93_CLK_A55_SEL …
#define IMX93_CLK_A55_CORE …
#define IMX93_CLK_PDM_IPG …
#define IMX93_CLK_END …
#endif