/* * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved. * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include <linux/pci.h> #include <linux/netdevice.h> #include <linux/vmalloc.h> #include <linux/delay.h> #include <linux/module.h> #include <linux/printk.h> #ifdef CONFIG_INFINIBAND_QIB_DCA #include <linux/dca.h> #endif #include <rdma/rdma_vt.h> #include "qib.h" #include "qib_common.h" #include "qib_mad.h" #ifdef CONFIG_DEBUG_FS #include "qib_debugfs.h" #include "qib_verbs.h" #endif #undef pr_fmt #define pr_fmt(fmt) … /* * min buffers we want to have per context, after driver */ #define QIB_MIN_USER_CTXT_BUFCNT … #define QLOGIC_IB_R_SOFTWARE_MASK … #define QLOGIC_IB_R_SOFTWARE_SHIFT … #define QLOGIC_IB_R_EMULATOR_MASK … /* * Number of ctxts we are configured to use (to allow for more pio * buffers per ctxt, etc.) Zero means use chip value. */ ushort qib_cfgctxts; module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO); MODULE_PARM_DESC(…) …; unsigned qib_numa_aware; module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO); MODULE_PARM_DESC(…) …; /* * If set, do not write to any regs if avoidable, hack to allow * check for deranged default register values. */ ushort qib_mini_init; module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO); MODULE_PARM_DESC(…) …; unsigned qib_n_krcv_queues; module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO); MODULE_PARM_DESC(…) …; unsigned qib_cc_table_size; module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO); MODULE_PARM_DESC(…) …; static void verify_interrupt(struct timer_list *); DEFINE_XARRAY_FLAGS(…); u32 qib_cpulist_count; unsigned long *qib_cpulist; /* set number of contexts we'll actually use */ void qib_set_ctxtcnt(struct qib_devdata *dd) { … } /* * Common code for creating the receive context array. */ int qib_create_ctxts(struct qib_devdata *dd) { … } /* * Common code for user and kernel context setup. */ struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt, int node_id) { … } /* * Common code for initializing the physical port structure. */ int qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd, u8 hw_pidx, u8 port) { … } static int init_pioavailregs(struct qib_devdata *dd) { … } /** * init_shadow_tids - allocate the shadow TID array * @dd: the qlogic_ib device * * allocate the shadow TID array, so we can qib_munlock previous * entries. It may make more sense to move the pageshadow to the * ctxt data structure, so we only allocate memory for ctxts actually * in use, since we at 8k per ctxt, now. * We don't want failures here to prevent use of the driver/chip, * so no return value. */ static void init_shadow_tids(struct qib_devdata *dd) { … } /* * Do initialization for device that is only needed on * first detect, not on resets. */ static int loadtime_init(struct qib_devdata *dd) { … } /** * init_after_reset - re-initialize after a reset * @dd: the qlogic_ib device * * sanity check at least some of the values after reset, and * ensure no receive or transmit (explicitly, in case reset * failed */ static int init_after_reset(struct qib_devdata *dd) { … } static void enable_chip(struct qib_devdata *dd) { … } static void verify_interrupt(struct timer_list *t) { … } static void init_piobuf_state(struct qib_devdata *dd) { … } /** * qib_create_workqueues - create per port workqueues * @dd: the qlogic_ib device */ static int qib_create_workqueues(struct qib_devdata *dd) { … } static void qib_free_pportdata(struct qib_pportdata *ppd) { … } /** * qib_init - do the actual initialization sequence on the chip * @dd: the qlogic_ib device * @reinit: reinitializing, so don't allocate new memory * * Do the actual initialization sequence on the chip. This is done * both from the init routine called from the PCI infrastructure, and * when we reset the chip, or detect that it was reset internally, * or it's administratively re-enabled. * * Memory allocation here and in called routines is only done in * the first case (reinit == 0). We have to be careful, because even * without memory allocation, we need to re-write all the chip registers * TIDs, etc. after the reset or enable has completed. */ int qib_init(struct qib_devdata *dd, int reinit) { … } /* * These next two routines are placeholders in case we don't have per-arch * code for controlling write combining. If explicit control of write * combining is not available, performance will probably be awful. */ int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd) { … } void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd) { … } struct qib_devdata *qib_lookup(int unit) { … } /* * Stop the timers during unit shutdown, or after an error late * in initialization. */ static void qib_stop_timers(struct qib_devdata *dd) { … } /** * qib_shutdown_device - shut down a device * @dd: the qlogic_ib device * * This is called to make the device quiet when we are about to * unload the driver, and also when the device is administratively * disabled. It does not free any data structures. * Everything it does has to be setup again by qib_init(dd, 1) */ static void qib_shutdown_device(struct qib_devdata *dd) { … } /** * qib_free_ctxtdata - free a context's allocated data * @dd: the qlogic_ib device * @rcd: the ctxtdata structure * * free up any allocated data for a context * This should not touch anything that would affect a simultaneous * re-allocation of context data, because it is called after qib_mutex * is released (and can be called from reinit as well). * It should never change any chip state, or global driver state. */ void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd) { … } /* * Perform a PIO buffer bandwidth write test, to verify proper system * configuration. Even when all the setup calls work, occasionally * BIOS or other issues can prevent write combining from working, or * can cause other bandwidth problems to the chip. * * This test simply writes the same buffer over and over again, and * measures close to the peak bandwidth to the chip (not testing * data bandwidth to the wire). On chips that use an address-based * trigger to send packets to the wire, this is easy. On chips that * use a count to trigger, we want to make sure that the packet doesn't * go out on the wire, or trigger flow control checks. */ static void qib_verify_pioperf(struct qib_devdata *dd) { … } void qib_free_devdata(struct qib_devdata *dd) { … } u64 qib_int_counter(struct qib_devdata *dd) { … } u64 qib_sps_ints(void) { … } /* * Allocate our primary per-unit data structure. Must be done via verbs * allocator, because the verbs cleanup process both does cleanup and * free of the data structure. * "extra" is for chip-specific data. */ struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra) { … } /* * Called from freeze mode handlers, and from PCI error * reporting code. Should be paranoid about state of * system and data structures. */ void qib_disable_after_error(struct qib_devdata *dd) { … } static void qib_remove_one(struct pci_dev *); static int qib_init_one(struct pci_dev *, const struct pci_device_id *); static void qib_shutdown_one(struct pci_dev *); #define DRIVER_LOAD_MSG … #define PFX … static const struct pci_device_id qib_pci_tbl[] = …; MODULE_DEVICE_TABLE(pci, qib_pci_tbl); static struct pci_driver qib_driver = …; #ifdef CONFIG_INFINIBAND_QIB_DCA static int qib_notify_dca(struct notifier_block *, unsigned long, void *); static struct notifier_block dca_notifier = …; static int qib_notify_dca_device(struct device *device, void *data) { … } static int qib_notify_dca(struct notifier_block *nb, unsigned long event, void *p) { … } #endif /* * Do all the generic driver unit- and chip-independent memory * allocation and initialization. */ static int __init qib_ib_init(void) { … } module_init(…) …; /* * Do the non-unit driver cleanup, memory free, etc. at unload. */ static void __exit qib_ib_cleanup(void) { … } module_exit(qib_ib_cleanup); /* this can only be called after a successful initialization */ static void cleanup_device_data(struct qib_devdata *dd) { … } /* * Clean up on unit shutdown, or error during unit load after * successful initialization. */ static void qib_postinit_cleanup(struct qib_devdata *dd) { … } static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { … } static void qib_remove_one(struct pci_dev *pdev) { … } static void qib_shutdown_one(struct pci_dev *pdev) { … } /** * qib_create_rcvhdrq - create a receive header queue * @dd: the qlogic_ib device * @rcd: the context data * * This must be contiguous memory (from an i/o perspective), and must be * DMA'able (which means for some systems, it will go through an IOMMU, * or be forced into a low address range). */ int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd) { … } /** * qib_setup_eagerbufs - allocate eager buffers, both kernel and user contexts. * @rcd: the context we are setting up. * * Allocate the eager TID buffers and program them into hip. * They are no longer completely contiguous, we do multiple allocation * calls. Otherwise we get the OOM code involved, by asking for too * much per call, with disastrous results on some kernels. */ int qib_setup_eagerbufs(struct qib_ctxtdata *rcd) { … } /* * Note: Changes to this routine should be mirrored * for the diagnostics routine qib_remap_ioaddr32(). * There is also related code for VL15 buffers in qib_init_7322_variables(). * The teardown code that unmaps is in qib_pcie_ddcleanup() */ int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) { … }
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