linux/drivers/clk/imx/clk-imx8mm.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2017-2018 NXP.
 */

#include <dt-bindings/clock/imx8mm-clock.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>

#include "clk.h"

static u32 share_count_sai1;
static u32 share_count_sai2;
static u32 share_count_sai3;
static u32 share_count_sai4;
static u32 share_count_sai5;
static u32 share_count_sai6;
static u32 share_count_disp;
static u32 share_count_pdm;
static u32 share_count_nand;

static const char *pll_ref_sels[] =;
static const char *audio_pll1_bypass_sels[] =;
static const char *audio_pll2_bypass_sels[] =;
static const char *video_pll1_bypass_sels[] =;
static const char *dram_pll_bypass_sels[] =;
static const char *gpu_pll_bypass_sels[] =;
static const char *vpu_pll_bypass_sels[] =;
static const char *arm_pll_bypass_sels[] =;
static const char *sys_pll3_bypass_sels[] =;

/* CCM ROOT */
static const char *imx8mm_a53_sels[] =;

static const char * const imx8mm_a53_core_sels[] =;

static const char *imx8mm_m4_sels[] =;

static const char *imx8mm_vpu_sels[] =;

static const char *imx8mm_gpu3d_sels[] =;

static const char *imx8mm_gpu2d_sels[] =;

static const char *imx8mm_main_axi_sels[] =;

static const char *imx8mm_enet_axi_sels[] =;

static const char *imx8mm_nand_usdhc_sels[] =;

static const char *imx8mm_vpu_bus_sels[] =;

static const char *imx8mm_disp_axi_sels[] =;

static const char *imx8mm_disp_apb_sels[] =;

static const char *imx8mm_disp_rtrm_sels[] =;

static const char *imx8mm_usb_bus_sels[] =;

static const char *imx8mm_gpu_axi_sels[] =;

static const char *imx8mm_gpu_ahb_sels[] =;

static const char *imx8mm_noc_sels[] =;

static const char *imx8mm_noc_apb_sels[] =;

static const char *imx8mm_ahb_sels[] =;

static const char *imx8mm_audio_ahb_sels[] =;

static const char *imx8mm_dram_alt_sels[] =;

static const char *imx8mm_dram_apb_sels[] =;

static const char *imx8mm_vpu_g1_sels[] =;

static const char *imx8mm_vpu_g2_sels[] =;

static const char *imx8mm_disp_dtrc_sels[] =;

static const char *imx8mm_disp_dc8000_sels[] =;

static const char *imx8mm_pcie1_ctrl_sels[] =;

static const char *imx8mm_pcie1_phy_sels[] =;

static const char *imx8mm_pcie1_aux_sels[] =;

static const char *imx8mm_dc_pixel_sels[] =;

static const char *imx8mm_lcdif_pixel_sels[] =;

static const char *imx8mm_sai1_sels[] =;

static const char *imx8mm_sai2_sels[] =;

static const char *imx8mm_sai3_sels[] =;

static const char *imx8mm_sai4_sels[] =;

static const char *imx8mm_sai5_sels[] =;

static const char *imx8mm_sai6_sels[] =;

static const char *imx8mm_spdif1_sels[] =;

static const char *imx8mm_spdif2_sels[] =;

static const char *imx8mm_enet_ref_sels[] =;

static const char *imx8mm_enet_timer_sels[] =;

static const char *imx8mm_enet_phy_sels[] =;

static const char *imx8mm_nand_sels[] =;

static const char *imx8mm_qspi_sels[] =;

static const char *imx8mm_usdhc1_sels[] =;

static const char *imx8mm_usdhc2_sels[] =;

static const char *imx8mm_i2c1_sels[] =;

static const char *imx8mm_i2c2_sels[] =;

static const char *imx8mm_i2c3_sels[] =;

static const char *imx8mm_i2c4_sels[] =;

static const char *imx8mm_uart1_sels[] =;

static const char *imx8mm_uart2_sels[] =;

static const char *imx8mm_uart3_sels[] =;

static const char *imx8mm_uart4_sels[] =;

static const char *imx8mm_usb_core_sels[] =;

static const char *imx8mm_usb_phy_sels[] =;

static const char *imx8mm_gic_sels[] =;

static const char *imx8mm_ecspi1_sels[] =;

static const char *imx8mm_ecspi2_sels[] =;

static const char *imx8mm_pwm1_sels[] =;

static const char *imx8mm_pwm2_sels[] =;

static const char *imx8mm_pwm3_sels[] =;

static const char *imx8mm_pwm4_sels[] =;

static const char *imx8mm_gpt1_sels[] =;

static const char *imx8mm_wdog_sels[] =;

static const char *imx8mm_wrclk_sels[] =;

static const char *imx8mm_dsi_core_sels[] =;

static const char *imx8mm_dsi_phy_sels[] =;

static const char *imx8mm_dsi_dbi_sels[] =;

static const char *imx8mm_usdhc3_sels[] =;

static const char *imx8mm_csi1_core_sels[] =;

static const char *imx8mm_csi1_phy_sels[] =;

static const char *imx8mm_csi1_esc_sels[] =;

static const char *imx8mm_csi2_core_sels[] =;

static const char *imx8mm_csi2_phy_sels[] =;

static const char *imx8mm_csi2_esc_sels[] =;

static const char *imx8mm_pcie2_ctrl_sels[] =;

static const char *imx8mm_pcie2_phy_sels[] =;

static const char *imx8mm_pcie2_aux_sels[] =;

static const char *imx8mm_ecspi3_sels[] =;

static const char *imx8mm_pdm_sels[] =;

static const char *imx8mm_vpu_h1_sels[] =;

static const char *imx8mm_dram_core_sels[] =;

static const char *imx8mm_clko1_sels[] =;
static const char *imx8mm_clko2_sels[] =;

static const char * const clkout_sels[] =;

static struct clk_hw_onecell_data *clk_hw_data;
static struct clk_hw **hws;

static int imx8mm_clocks_probe(struct platform_device *pdev)
{}

static const struct of_device_id imx8mm_clk_of_match[] =;
MODULE_DEVICE_TABLE(of, imx8mm_clk_of_match);

static struct platform_driver imx8mm_clk_driver =;
module_platform_driver();
module_param(mcore_booted, bool, S_IRUGO);
MODULE_PARM_DESC();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();