linux/drivers/infiniband/hw/efa/efa_regs_defs.h

/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
/*
 * Copyright 2018-2021 Amazon.com, Inc. or its affiliates. All rights reserved.
 */

#ifndef _EFA_REGS_H_
#define _EFA_REGS_H_

enum efa_regs_reset_reason_types {};

/* efa_registers offsets */

/* 0 base */
#define EFA_REGS_VERSION_OFF
#define EFA_REGS_CONTROLLER_VERSION_OFF
#define EFA_REGS_CAPS_OFF
#define EFA_REGS_AQ_BASE_LO_OFF
#define EFA_REGS_AQ_BASE_HI_OFF
#define EFA_REGS_AQ_CAPS_OFF
#define EFA_REGS_ACQ_BASE_LO_OFF
#define EFA_REGS_ACQ_BASE_HI_OFF
#define EFA_REGS_ACQ_CAPS_OFF
#define EFA_REGS_AQ_PROD_DB_OFF
#define EFA_REGS_AENQ_CAPS_OFF
#define EFA_REGS_AENQ_BASE_LO_OFF
#define EFA_REGS_AENQ_BASE_HI_OFF
#define EFA_REGS_AENQ_CONS_DB_OFF
#define EFA_REGS_INTR_MASK_OFF
#define EFA_REGS_DEV_CTL_OFF
#define EFA_REGS_DEV_STS_OFF
#define EFA_REGS_MMIO_REG_READ_OFF
#define EFA_REGS_MMIO_RESP_LO_OFF
#define EFA_REGS_MMIO_RESP_HI_OFF
#define EFA_REGS_EQ_DB_OFF

/* version register */
#define EFA_REGS_VERSION_MINOR_VERSION_MASK
#define EFA_REGS_VERSION_MAJOR_VERSION_MASK

/* controller_version register */
#define EFA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK
#define EFA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK
#define EFA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK
#define EFA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK

/* caps register */
#define EFA_REGS_CAPS_CONTIGUOUS_QUEUE_REQUIRED_MASK
#define EFA_REGS_CAPS_RESET_TIMEOUT_MASK
#define EFA_REGS_CAPS_DMA_ADDR_WIDTH_MASK
#define EFA_REGS_CAPS_ADMIN_CMD_TO_MASK

/* aq_caps register */
#define EFA_REGS_AQ_CAPS_AQ_DEPTH_MASK
#define EFA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK

/* acq_caps register */
#define EFA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK
#define EFA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK
#define EFA_REGS_ACQ_CAPS_ACQ_MSIX_VECTOR_MASK

/* aenq_caps register */
#define EFA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK
#define EFA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK
#define EFA_REGS_AENQ_CAPS_AENQ_MSIX_VECTOR_MASK

/* intr_mask register */
#define EFA_REGS_INTR_MASK_EN_MASK

/* dev_ctl register */
#define EFA_REGS_DEV_CTL_DEV_RESET_MASK
#define EFA_REGS_DEV_CTL_AQ_RESTART_MASK
#define EFA_REGS_DEV_CTL_RESET_REASON_MASK

/* dev_sts register */
#define EFA_REGS_DEV_STS_READY_MASK
#define EFA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_MASK
#define EFA_REGS_DEV_STS_AQ_RESTART_FINISHED_MASK
#define EFA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK
#define EFA_REGS_DEV_STS_RESET_FINISHED_MASK
#define EFA_REGS_DEV_STS_FATAL_ERROR_MASK

/* mmio_reg_read register */
#define EFA_REGS_MMIO_REG_READ_REQ_ID_MASK
#define EFA_REGS_MMIO_REG_READ_REG_OFF_MASK

/* eq_db register */
#define EFA_REGS_EQ_DB_EQN_MASK
#define EFA_REGS_EQ_DB_ARM_MASK

#endif /* _EFA_REGS_H_ */