/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ /* Copyright (c) 2015 - 2021 Intel Corporation */ #ifndef IRDMA_DEFS_H #define IRDMA_DEFS_H #define IRDMA_FIRST_USER_QP_ID … #define ECN_CODE_PT_VAL … #define IRDMA_PUSH_OFFSET … #define IRDMA_PF_FIRST_PUSH_PAGE_INDEX … #define IRDMA_PF_BAR_RSVD … #define IRDMA_PE_DB_SIZE_4M … #define IRDMA_PE_DB_SIZE_8M … #define IRDMA_IRD_HW_SIZE_4 … #define IRDMA_IRD_HW_SIZE_16 … #define IRDMA_IRD_HW_SIZE_64 … #define IRDMA_IRD_HW_SIZE_128 … #define IRDMA_IRD_HW_SIZE_256 … enum irdma_protocol_used { … }; #define IRDMA_QP_STATE_INVALID … #define IRDMA_QP_STATE_IDLE … #define IRDMA_QP_STATE_RTS … #define IRDMA_QP_STATE_CLOSING … #define IRDMA_QP_STATE_SQD … #define IRDMA_QP_STATE_RTR … #define IRDMA_QP_STATE_TERMINATE … #define IRDMA_QP_STATE_ERROR … #define IRDMA_MAX_TRAFFIC_CLASS … #define IRDMA_MAX_STATS_COUNT_GEN_1 … #define IRDMA_MAX_USER_PRIORITY … #define IRDMA_MAX_APPS … #define IRDMA_MAX_STATS_COUNT … #define IRDMA_FIRST_NON_PF_STAT … #define IRDMA_MIN_MTU_IPV4 … #define IRDMA_MIN_MTU_IPV6 … #define IRDMA_MTU_TO_MSS_IPV4 … #define IRDMA_MTU_TO_MSS_IPV6 … #define IRDMA_DEFAULT_MTU … #define Q2_FPSN_OFFSET … #define TERM_DDP_LEN_TAGGED … #define TERM_DDP_LEN_UNTAGGED … #define TERM_RDMA_LEN … #define RDMA_OPCODE_M … #define RDMA_READ_REQ_OPCODE … #define Q2_BAD_FRAME_OFFSET … #define CQE_MAJOR_DRV … #define IRDMA_TERM_SENT … #define IRDMA_TERM_RCVD … #define IRDMA_TERM_DONE … #define IRDMA_MAC_HLEN … #define IRDMA_CQP_WAIT_POLL_REGS … #define IRDMA_CQP_WAIT_POLL_CQ … #define IRDMA_CQP_WAIT_EVENT … #define IRDMA_AE_SOURCE_RSVD … #define IRDMA_AE_SOURCE_RQ … #define IRDMA_AE_SOURCE_RQ_0011 … #define IRDMA_AE_SOURCE_CQ … #define IRDMA_AE_SOURCE_CQ_0110 … #define IRDMA_AE_SOURCE_CQ_1010 … #define IRDMA_AE_SOURCE_CQ_1110 … #define IRDMA_AE_SOURCE_SQ … #define IRDMA_AE_SOURCE_SQ_0111 … #define IRDMA_AE_SOURCE_IN_RR_WR … #define IRDMA_AE_SOURCE_IN_RR_WR_1011 … #define IRDMA_AE_SOURCE_OUT_RR … #define IRDMA_AE_SOURCE_OUT_RR_1111 … #define IRDMA_TCP_STATE_NON_EXISTENT … #define IRDMA_TCP_STATE_CLOSED … #define IRDMA_TCP_STATE_LISTEN … #define IRDMA_STATE_SYN_SEND … #define IRDMA_TCP_STATE_SYN_RECEIVED … #define IRDMA_TCP_STATE_ESTABLISHED … #define IRDMA_TCP_STATE_CLOSE_WAIT … #define IRDMA_TCP_STATE_FIN_WAIT_1 … #define IRDMA_TCP_STATE_CLOSING … #define IRDMA_TCP_STATE_LAST_ACK … #define IRDMA_TCP_STATE_FIN_WAIT_2 … #define IRDMA_TCP_STATE_TIME_WAIT … #define IRDMA_TCP_STATE_RESERVED_1 … #define IRDMA_TCP_STATE_RESERVED_2 … #define IRDMA_TCP_STATE_RESERVED_3 … #define IRDMA_TCP_STATE_RESERVED_4 … #define IRDMA_CQP_SW_SQSIZE_4 … #define IRDMA_CQP_SW_SQSIZE_2048 … #define IRDMA_CQ_TYPE_IWARP … #define IRDMA_CQ_TYPE_ILQ … #define IRDMA_CQ_TYPE_IEQ … #define IRDMA_CQ_TYPE_CQP … #define IRDMA_DONE_COUNT … #define IRDMA_SLEEP_COUNT … #define IRDMA_UPDATE_SD_BUFF_SIZE … #define IRDMA_FEATURE_BUF_SIZE … #define IRDMA_MAX_QUANTA_PER_WR … #define IRDMA_QP_SW_MAX_WQ_QUANTA … #define IRDMA_QP_SW_MAX_SQ_QUANTA … #define IRDMA_QP_SW_MAX_RQ_QUANTA … #define IRDMA_MAX_QP_WRS(max_quanta_per_wr) … #define IRDMAQP_TERM_SEND_TERM_AND_FIN … #define IRDMAQP_TERM_SEND_TERM_ONLY … #define IRDMAQP_TERM_SEND_FIN_ONLY … #define IRDMAQP_TERM_DONOT_SEND_TERM_OR_FIN … #define IRDMA_QP_TYPE_IWARP … #define IRDMA_QP_TYPE_UDA … #define IRDMA_QP_TYPE_ROCE_RC … #define IRDMA_QP_TYPE_ROCE_UD … #define IRDMA_HW_PAGE_SIZE … #define IRDMA_HW_PAGE_SHIFT … #define IRDMA_CQE_QTYPE_RQ … #define IRDMA_CQE_QTYPE_SQ … #define IRDMA_QP_SW_MIN_WQSIZE … #define IRDMA_QP_WQE_MIN_SIZE … #define IRDMA_QP_WQE_MAX_SIZE … #define IRDMA_QP_WQE_MIN_QUANTA … #define IRDMA_MAX_RQ_WQE_SHIFT_GEN1 … #define IRDMA_MAX_RQ_WQE_SHIFT_GEN2 … #define IRDMA_SQ_RSVD … #define IRDMA_RQ_RSVD … #define IRDMA_FEATURE_RTS_AE … #define IRDMA_FEATURE_CQ_RESIZE … #define IRDMAQP_OP_RDMA_WRITE … #define IRDMAQP_OP_RDMA_READ … #define IRDMAQP_OP_RDMA_SEND … #define IRDMAQP_OP_RDMA_SEND_INV … #define IRDMAQP_OP_RDMA_SEND_SOL_EVENT … #define IRDMAQP_OP_RDMA_SEND_SOL_EVENT_INV … #define IRDMAQP_OP_BIND_MW … #define IRDMAQP_OP_FAST_REGISTER … #define IRDMAQP_OP_LOCAL_INVALIDATE … #define IRDMAQP_OP_RDMA_READ_LOC_INV … #define IRDMAQP_OP_NOP … #define IRDMAQP_OP_RDMA_WRITE_SOL … #define IRDMAQP_OP_GEN_RTS_AE … enum irdma_cqp_op_type { … }; /* CQP SQ WQES */ #define IRDMA_CQP_OP_CREATE_QP … #define IRDMA_CQP_OP_MODIFY_QP … #define IRDMA_CQP_OP_DESTROY_QP … #define IRDMA_CQP_OP_CREATE_CQ … #define IRDMA_CQP_OP_MODIFY_CQ … #define IRDMA_CQP_OP_DESTROY_CQ … #define IRDMA_CQP_OP_ALLOC_STAG … #define IRDMA_CQP_OP_REG_MR … #define IRDMA_CQP_OP_QUERY_STAG … #define IRDMA_CQP_OP_REG_SMR … #define IRDMA_CQP_OP_DEALLOC_STAG … #define IRDMA_CQP_OP_MANAGE_LOC_MAC_TABLE … #define IRDMA_CQP_OP_MANAGE_ARP … #define IRDMA_CQP_OP_MANAGE_VF_PBLE_BP … #define IRDMA_CQP_OP_MANAGE_PUSH_PAGES … #define IRDMA_CQP_OP_QUERY_RDMA_FEATURES … #define IRDMA_CQP_OP_UPLOAD_CONTEXT … #define IRDMA_CQP_OP_ALLOCATE_LOC_MAC_TABLE_ENTRY … #define IRDMA_CQP_OP_UPLOAD_CONTEXT … #define IRDMA_CQP_OP_MANAGE_HMC_PM_FUNC_TABLE … #define IRDMA_CQP_OP_CREATE_CEQ … #define IRDMA_CQP_OP_DESTROY_CEQ … #define IRDMA_CQP_OP_CREATE_AEQ … #define IRDMA_CQP_OP_DESTROY_AEQ … #define IRDMA_CQP_OP_CREATE_ADDR_HANDLE … #define IRDMA_CQP_OP_MODIFY_ADDR_HANDLE … #define IRDMA_CQP_OP_DESTROY_ADDR_HANDLE … #define IRDMA_CQP_OP_UPDATE_PE_SDS … #define IRDMA_CQP_OP_QUERY_FPM_VAL … #define IRDMA_CQP_OP_COMMIT_FPM_VAL … #define IRDMA_CQP_OP_FLUSH_WQES … /* IRDMA_CQP_OP_GEN_AE is the same value as IRDMA_CQP_OP_FLUSH_WQES */ #define IRDMA_CQP_OP_GEN_AE … #define IRDMA_CQP_OP_MANAGE_APBVT … #define IRDMA_CQP_OP_NOP … #define IRDMA_CQP_OP_MANAGE_QUAD_HASH_TABLE_ENTRY … #define IRDMA_CQP_OP_CREATE_MCAST_GRP … #define IRDMA_CQP_OP_MODIFY_MCAST_GRP … #define IRDMA_CQP_OP_DESTROY_MCAST_GRP … #define IRDMA_CQP_OP_SUSPEND_QP … #define IRDMA_CQP_OP_RESUME_QP … #define IRDMA_CQP_OP_SHMC_PAGES_ALLOCATED … #define IRDMA_CQP_OP_WORK_SCHED_NODE … #define IRDMA_CQP_OP_MANAGE_STATS … #define IRDMA_CQP_OP_GATHER_STATS … #define IRDMA_CQP_OP_UP_MAP … /* Async Events codes */ #define IRDMA_AE_AMP_UNALLOCATED_STAG … #define IRDMA_AE_AMP_INVALID_STAG … #define IRDMA_AE_AMP_BAD_QP … #define IRDMA_AE_AMP_BAD_PD … #define IRDMA_AE_AMP_BAD_STAG_KEY … #define IRDMA_AE_AMP_BAD_STAG_INDEX … #define IRDMA_AE_AMP_BOUNDS_VIOLATION … #define IRDMA_AE_AMP_RIGHTS_VIOLATION … #define IRDMA_AE_AMP_TO_WRAP … #define IRDMA_AE_AMP_FASTREG_VALID_STAG … #define IRDMA_AE_AMP_FASTREG_MW_STAG … #define IRDMA_AE_AMP_FASTREG_INVALID_RIGHTS … #define IRDMA_AE_AMP_FASTREG_INVALID_LENGTH … #define IRDMA_AE_AMP_INVALIDATE_SHARED … #define IRDMA_AE_AMP_INVALIDATE_NO_REMOTE_ACCESS_RIGHTS … #define IRDMA_AE_AMP_INVALIDATE_MR_WITH_BOUND_WINDOWS … #define IRDMA_AE_AMP_MWBIND_VALID_STAG … #define IRDMA_AE_AMP_MWBIND_OF_MR_STAG … #define IRDMA_AE_AMP_MWBIND_TO_ZERO_BASED_STAG … #define IRDMA_AE_AMP_MWBIND_TO_MW_STAG … #define IRDMA_AE_AMP_MWBIND_INVALID_RIGHTS … #define IRDMA_AE_AMP_MWBIND_INVALID_BOUNDS … #define IRDMA_AE_AMP_MWBIND_TO_INVALID_PARENT … #define IRDMA_AE_AMP_MWBIND_BIND_DISABLED … #define IRDMA_AE_PRIV_OPERATION_DENIED … #define IRDMA_AE_AMP_INVALIDATE_TYPE1_MW … #define IRDMA_AE_AMP_MWBIND_ZERO_BASED_TYPE1_MW … #define IRDMA_AE_AMP_FASTREG_INVALID_PBL_HPS_CFG … #define IRDMA_AE_AMP_MWBIND_WRONG_TYPE … #define IRDMA_AE_AMP_FASTREG_PBLE_MISMATCH … #define IRDMA_AE_UDA_XMIT_DGRAM_TOO_LONG … #define IRDMA_AE_UDA_XMIT_BAD_PD … #define IRDMA_AE_UDA_XMIT_DGRAM_TOO_SHORT … #define IRDMA_AE_UDA_L4LEN_INVALID … #define IRDMA_AE_BAD_CLOSE … #define IRDMA_AE_RDMAP_ROE_BAD_LLP_CLOSE … #define IRDMA_AE_CQ_OPERATION_ERROR … #define IRDMA_AE_RDMA_READ_WHILE_ORD_ZERO … #define IRDMA_AE_STAG_ZERO_INVALID … #define IRDMA_AE_IB_RREQ_AND_Q1_FULL … #define IRDMA_AE_IB_INVALID_REQUEST … #define IRDMA_AE_WQE_UNEXPECTED_OPCODE … #define IRDMA_AE_WQE_INVALID_PARAMETER … #define IRDMA_AE_WQE_INVALID_FRAG_DATA … #define IRDMA_AE_IB_REMOTE_ACCESS_ERROR … #define IRDMA_AE_IB_REMOTE_OP_ERROR … #define IRDMA_AE_WQE_LSMM_TOO_LONG … #define IRDMA_AE_INVALID_REQUEST … #define IRDMA_AE_DDP_INVALID_MSN_GAP_IN_MSN … #define IRDMA_AE_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER … #define IRDMA_AE_DDP_UBE_INVALID_DDP_VERSION … #define IRDMA_AE_DDP_UBE_INVALID_MO … #define IRDMA_AE_DDP_UBE_INVALID_MSN_NO_BUFFER_AVAILABLE … #define IRDMA_AE_DDP_UBE_INVALID_QN … #define IRDMA_AE_DDP_NO_L_BIT … #define IRDMA_AE_RDMAP_ROE_INVALID_RDMAP_VERSION … #define IRDMA_AE_RDMAP_ROE_UNEXPECTED_OPCODE … #define IRDMA_AE_ROE_INVALID_RDMA_READ_REQUEST … #define IRDMA_AE_ROE_INVALID_RDMA_WRITE_OR_READ_RESP … #define IRDMA_AE_ROCE_RSP_LENGTH_ERROR … #define IRDMA_AE_ROCE_EMPTY_MCG … #define IRDMA_AE_ROCE_BAD_MC_IP_ADDR … #define IRDMA_AE_ROCE_BAD_MC_QPID … #define IRDMA_AE_MCG_QP_PROTOCOL_MISMATCH … #define IRDMA_AE_INVALID_ARP_ENTRY … #define IRDMA_AE_INVALID_TCP_OPTION_RCVD … #define IRDMA_AE_STALE_ARP_ENTRY … #define IRDMA_AE_INVALID_AH_ENTRY … #define IRDMA_AE_LLP_CLOSE_COMPLETE … #define IRDMA_AE_LLP_CONNECTION_RESET … #define IRDMA_AE_LLP_FIN_RECEIVED … #define IRDMA_AE_LLP_RECEIVED_MARKER_AND_LENGTH_FIELDS_DONT_MATCH … #define IRDMA_AE_LLP_RECEIVED_MPA_CRC_ERROR … #define IRDMA_AE_LLP_SEGMENT_TOO_SMALL … #define IRDMA_AE_LLP_SYN_RECEIVED … #define IRDMA_AE_LLP_TERMINATE_RECEIVED … #define IRDMA_AE_LLP_TOO_MANY_RETRIES … #define IRDMA_AE_LLP_TOO_MANY_KEEPALIVE_RETRIES … #define IRDMA_AE_LLP_DOUBT_REACHABILITY … #define IRDMA_AE_LLP_CONNECTION_ESTABLISHED … #define IRDMA_AE_LLP_TOO_MANY_RNRS … #define IRDMA_AE_RESOURCE_EXHAUSTION … #define IRDMA_AE_RESET_SENT … #define IRDMA_AE_TERMINATE_SENT … #define IRDMA_AE_RESET_NOT_SENT … #define IRDMA_AE_LCE_QP_CATASTROPHIC … #define IRDMA_AE_LCE_FUNCTION_CATASTROPHIC … #define IRDMA_AE_LCE_CQ_CATASTROPHIC … #define IRDMA_AE_QP_SUSPEND_COMPLETE … #define FLD_LS_64(dev, val, field) … #define FLD_RS_64(dev, val, field) … #define FLD_LS_32(dev, val, field) … #define FLD_RS_32(dev, val, field) … #define IRDMA_MAX_STATS_24 … #define IRDMA_MAX_STATS_32 … #define IRDMA_MAX_STATS_48 … #define IRDMA_MAX_STATS_56 … #define IRDMA_MAX_STATS_64 … #define IRDMA_MAX_CQ_READ_THRESH … #define IRDMA_CQPSQ_QHASH_VLANID … #define IRDMA_CQPSQ_QHASH_QPN … #define IRDMA_CQPSQ_QHASH_QS_HANDLE … #define IRDMA_CQPSQ_QHASH_SRC_PORT … #define IRDMA_CQPSQ_QHASH_DEST_PORT … #define IRDMA_CQPSQ_QHASH_ADDR0 … #define IRDMA_CQPSQ_QHASH_ADDR1 … #define IRDMA_CQPSQ_QHASH_ADDR2 … #define IRDMA_CQPSQ_QHASH_ADDR3 … #define IRDMA_CQPSQ_QHASH_WQEVALID … #define IRDMA_CQPSQ_QHASH_OPCODE … #define IRDMA_CQPSQ_QHASH_MANAGE … #define IRDMA_CQPSQ_QHASH_IPV4VALID … #define IRDMA_CQPSQ_QHASH_VLANVALID … #define IRDMA_CQPSQ_QHASH_ENTRYTYPE … #define IRDMA_CQPSQ_STATS_WQEVALID … #define IRDMA_CQPSQ_STATS_ALLOC_INST … #define IRDMA_CQPSQ_STATS_USE_HMC_FCN_INDEX … #define IRDMA_CQPSQ_STATS_USE_INST … #define IRDMA_CQPSQ_STATS_OP … #define IRDMA_CQPSQ_STATS_INST_INDEX … #define IRDMA_CQPSQ_STATS_HMC_FCN_INDEX … #define IRDMA_CQPSQ_WS_WQEVALID … #define IRDMA_CQPSQ_WS_NODEOP … #define IRDMA_CQPSQ_WS_ENABLENODE … #define IRDMA_CQPSQ_WS_NODETYPE … #define IRDMA_CQPSQ_WS_PRIOTYPE … #define IRDMA_CQPSQ_WS_TC … #define IRDMA_CQPSQ_WS_VMVFTYPE … #define IRDMA_CQPSQ_WS_VMVFNUM … #define IRDMA_CQPSQ_WS_OP … #define IRDMA_CQPSQ_WS_PARENTID … #define IRDMA_CQPSQ_WS_NODEID … #define IRDMA_CQPSQ_WS_VSI … #define IRDMA_CQPSQ_WS_WEIGHT … #define IRDMA_CQPSQ_UP_WQEVALID … #define IRDMA_CQPSQ_UP_USEVLAN … #define IRDMA_CQPSQ_UP_USEOVERRIDE … #define IRDMA_CQPSQ_UP_OP … #define IRDMA_CQPSQ_UP_HMCFCNIDX … #define IRDMA_CQPSQ_UP_CNPOVERRIDE … #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_WQEVALID … #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_BUF_LEN … #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_OP … #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_HW_MODEL_USED … #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_HW_MAJOR_VERSION … #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_HW_MINOR_VERSION … #define IRDMA_CQPHC_SQSIZE … #define IRDMA_CQPHC_DISABLE_PFPDUS … #define IRDMA_CQPHC_ROCEV2_RTO_POLICY … #define IRDMA_CQPHC_PROTOCOL_USED … #define IRDMA_CQPHC_MIN_RATE … #define IRDMA_CQPHC_MIN_DEC_FACTOR … #define IRDMA_CQPHC_DCQCN_T … #define IRDMA_CQPHC_HAI_FACTOR … #define IRDMA_CQPHC_RAI_FACTOR … #define IRDMA_CQPHC_DCQCN_B … #define IRDMA_CQPHC_DCQCN_F … #define IRDMA_CQPHC_CC_CFG_VALID … #define IRDMA_CQPHC_RREDUCE_MPERIOD … #define IRDMA_CQPHC_HW_MINVER … #define IRDMA_CQPHC_HW_MAJVER_GEN_1 … #define IRDMA_CQPHC_HW_MAJVER_GEN_2 … #define IRDMA_CQPHC_HW_MAJVER_GEN_3 … #define IRDMA_CQPHC_HW_MAJVER … #define IRDMA_CQPHC_CEQPERVF … #define IRDMA_CQPHC_ENABLED_VFS … #define IRDMA_CQPHC_HMC_PROFILE … #define IRDMA_CQPHC_SVER … #define IRDMA_CQPHC_SQBASE … #define IRDMA_CQPHC_QPCTX … #define IRDMA_QP_DBSA_HW_SQ_TAIL … #define IRDMA_CQ_DBSA_CQEIDX … #define IRDMA_CQ_DBSA_SW_CQ_SELECT … #define IRDMA_CQ_DBSA_ARM_NEXT … #define IRDMA_CQ_DBSA_ARM_NEXT_SE … #define IRDMA_CQ_DBSA_ARM_SEQ_NUM … /* CQP and iWARP Completion Queue */ #define IRDMA_CQ_QPCTX … #define IRDMA_CCQ_OPRETVAL … #define IRDMA_CQ_MINERR … #define IRDMA_CQ_MAJERR … #define IRDMA_CQ_WQEIDX … #define IRDMA_CQ_EXTCQE … #define IRDMA_OOO_CMPL … #define IRDMA_CQ_ERROR … #define IRDMA_CQ_SQ … #define IRDMA_CQ_VALID … #define IRDMA_CQ_IMMVALID … #define IRDMA_CQ_UDSMACVALID … #define IRDMA_CQ_UDVLANVALID … #define IRDMA_CQ_UDSMAC … #define IRDMA_CQ_UDVLAN … #define IRDMA_CQ_IMMDATA_S … #define IRDMA_CQ_IMMDATA_M … #define IRDMA_CQ_IMMDATALOW32 … #define IRDMA_CQ_IMMDATAUP32 … #define IRDMACQ_PAYLDLEN … #define IRDMACQ_TCPSEQNUMRTT … #define IRDMACQ_INVSTAG … #define IRDMACQ_QPID … #define IRDMACQ_UDSRCQPN … #define IRDMACQ_PSHDROP … #define IRDMACQ_STAG … #define IRDMACQ_IPV4 … #define IRDMACQ_SOEVENT … #define IRDMACQ_OP … #define IRDMA_CEQE_CQCTX … #define IRDMA_CEQE_VALID … /* AEQE format */ #define IRDMA_AEQE_COMPCTX … #define IRDMA_AEQE_QPCQID_LOW … #define IRDMA_AEQE_QPCQID_HI … #define IRDMA_AEQE_WQDESCIDX … #define IRDMA_AEQE_OVERFLOW … #define IRDMA_AEQE_AECODE … #define IRDMA_AEQE_AESRC … #define IRDMA_AEQE_IWSTATE … #define IRDMA_AEQE_TCPSTATE … #define IRDMA_AEQE_Q2DATA … #define IRDMA_AEQE_VALID … #define IRDMA_UDA_QPSQ_NEXT_HDR … #define IRDMA_UDA_QPSQ_OPCODE … #define IRDMA_UDA_QPSQ_L4LEN … #define IRDMA_GEN1_UDA_QPSQ_L4LEN … #define IRDMA_UDA_QPSQ_AHIDX … #define IRDMA_UDA_QPSQ_VALID … #define IRDMA_UDA_QPSQ_SIGCOMPL … #define IRDMA_UDA_QPSQ_MACLEN … #define IRDMA_UDA_QPSQ_IPLEN … #define IRDMA_UDA_QPSQ_L4T … #define IRDMA_UDA_QPSQ_IIPT … #define IRDMA_UDA_PAYLOADLEN … #define IRDMA_UDA_HDRLEN … #define IRDMA_VLAN_TAG_VALID … #define IRDMA_UDA_L3PROTO … #define IRDMA_UDA_L4PROTO … #define IRDMA_UDA_QPSQ_DOLOOPBACK … #define IRDMA_CQPSQ_BUFSIZE … #define IRDMA_CQPSQ_OPCODE … #define IRDMA_CQPSQ_WQEVALID … #define IRDMA_CQPSQ_TPHVAL … #define IRDMA_CQPSQ_VSIIDX … #define IRDMA_CQPSQ_TPHEN … #define IRDMA_CQPSQ_PBUFADDR … /* Create/Modify/Destroy QP */ #define IRDMA_CQPSQ_QP_NEWMSS … #define IRDMA_CQPSQ_QP_TERMLEN … #define IRDMA_CQPSQ_QP_QPCTX … #define IRDMA_CQPSQ_QP_QPID_S … #define IRDMA_CQPSQ_QP_QPID_M … #define IRDMA_CQPSQ_QP_OP_S … #define IRDMA_CQPSQ_QP_OP_M … #define IRDMA_CQPSQ_QP_ORDVALID … #define IRDMA_CQPSQ_QP_TOECTXVALID … #define IRDMA_CQPSQ_QP_CACHEDVARVALID … #define IRDMA_CQPSQ_QP_VQ … #define IRDMA_CQPSQ_QP_FORCELOOPBACK … #define IRDMA_CQPSQ_QP_CQNUMVALID … #define IRDMA_CQPSQ_QP_QPTYPE … #define IRDMA_CQPSQ_QP_MACVALID … #define IRDMA_CQPSQ_QP_MSSCHANGE … #define IRDMA_CQPSQ_QP_IGNOREMWBOUND … #define IRDMA_CQPSQ_QP_REMOVEHASHENTRY … #define IRDMA_CQPSQ_QP_TERMACT … #define IRDMA_CQPSQ_QP_RESETCON … #define IRDMA_CQPSQ_QP_ARPTABIDXVALID … #define IRDMA_CQPSQ_QP_NEXTIWSTATE … #define IRDMA_CQPSQ_QP_DBSHADOWADDR … #define IRDMA_CQPSQ_CQ_CQSIZE … #define IRDMA_CQPSQ_CQ_CQCTX … #define IRDMA_CQPSQ_CQ_SHADOW_READ_THRESHOLD … #define IRDMA_CQPSQ_CQ_OP … #define IRDMA_CQPSQ_CQ_CQRESIZE … #define IRDMA_CQPSQ_CQ_LPBLSIZE … #define IRDMA_CQPSQ_CQ_CHKOVERFLOW … #define IRDMA_CQPSQ_CQ_VIRTMAP … #define IRDMA_CQPSQ_CQ_ENCEQEMASK … #define IRDMA_CQPSQ_CQ_CEQIDVALID … #define IRDMA_CQPSQ_CQ_AVOIDMEMCNFLCT … #define IRDMA_CQPSQ_CQ_FIRSTPMPBLIDX … /* Allocate/Register/Register Shared/Deallocate Stag */ #define IRDMA_CQPSQ_STAG_VA_FBO … #define IRDMA_CQPSQ_STAG_STAGLEN … #define IRDMA_CQPSQ_STAG_KEY … #define IRDMA_CQPSQ_STAG_IDX … #define IRDMA_CQPSQ_STAG_IDX_S … #define IRDMA_CQPSQ_STAG_PARENTSTAGIDX … #define IRDMA_CQPSQ_STAG_MR … #define IRDMA_CQPSQ_STAG_MWTYPE … #define IRDMA_CQPSQ_STAG_MW1_BIND_DONT_VLDT_KEY … #define IRDMA_CQPSQ_STAG_LPBLSIZE … #define IRDMA_CQPSQ_STAG_HPAGESIZE … #define IRDMA_CQPSQ_STAG_ARIGHTS … #define IRDMA_CQPSQ_STAG_REMACCENABLED … #define IRDMA_CQPSQ_STAG_VABASEDTO … #define IRDMA_CQPSQ_STAG_USEHMCFNIDX … #define IRDMA_CQPSQ_STAG_USEPFRID … #define IRDMA_CQPSQ_STAG_PBA … #define IRDMA_CQPSQ_STAG_HMCFNIDX … #define IRDMA_CQPSQ_STAG_FIRSTPMPBLIDX … #define IRDMA_CQPSQ_QUERYSTAG_IDX … #define IRDMA_CQPSQ_MLM_TABLEIDX … #define IRDMA_CQPSQ_MLM_FREEENTRY … #define IRDMA_CQPSQ_MLM_IGNORE_REF_CNT … #define IRDMA_CQPSQ_MLM_MAC0 … #define IRDMA_CQPSQ_MLM_MAC1 … #define IRDMA_CQPSQ_MLM_MAC2 … #define IRDMA_CQPSQ_MLM_MAC3 … #define IRDMA_CQPSQ_MLM_MAC4 … #define IRDMA_CQPSQ_MLM_MAC5 … #define IRDMA_CQPSQ_MAT_REACHMAX … #define IRDMA_CQPSQ_MAT_MACADDR … #define IRDMA_CQPSQ_MAT_ARPENTRYIDX … #define IRDMA_CQPSQ_MAT_ENTRYVALID … #define IRDMA_CQPSQ_MAT_PERMANENT … #define IRDMA_CQPSQ_MAT_QUERY … #define IRDMA_CQPSQ_MVPBP_PD_ENTRY_CNT … #define IRDMA_CQPSQ_MVPBP_FIRST_PD_INX … #define IRDMA_CQPSQ_MVPBP_SD_INX … #define IRDMA_CQPSQ_MVPBP_INV_PD_ENT … #define IRDMA_CQPSQ_MVPBP_PD_PLPBA … /* Manage Push Page - MPP */ #define IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1 … #define IRDMA_INVALID_PUSH_PAGE_INDEX … #define IRDMA_CQPSQ_MPP_QS_HANDLE … #define IRDMA_CQPSQ_MPP_PPIDX … #define IRDMA_CQPSQ_MPP_PPTYPE … #define IRDMA_CQPSQ_MPP_FREE_PAGE … /* Upload Context - UCTX */ #define IRDMA_CQPSQ_UCTX_QPCTXADDR … #define IRDMA_CQPSQ_UCTX_QPID … #define IRDMA_CQPSQ_UCTX_QPTYPE … #define IRDMA_CQPSQ_UCTX_RAWFORMAT … #define IRDMA_CQPSQ_UCTX_FREEZEQP … #define IRDMA_CQPSQ_MHMC_VFIDX … #define IRDMA_CQPSQ_MHMC_FREEPMFN … #define IRDMA_CQPSQ_SHMCRP_HMC_PROFILE … #define IRDMA_CQPSQ_SHMCRP_VFNUM … #define IRDMA_CQPSQ_CEQ_CEQSIZE … #define IRDMA_CQPSQ_CEQ_CEQID … #define IRDMA_CQPSQ_CEQ_LPBLSIZE … #define IRDMA_CQPSQ_CEQ_VMAP … #define IRDMA_CQPSQ_CEQ_ITRNOEXPIRE … #define IRDMA_CQPSQ_CEQ_FIRSTPMPBLIDX … #define IRDMA_CQPSQ_AEQ_AEQECNT … #define IRDMA_CQPSQ_AEQ_LPBLSIZE … #define IRDMA_CQPSQ_AEQ_VMAP … #define IRDMA_CQPSQ_AEQ_FIRSTPMPBLIDX … #define IRDMA_COMMIT_FPM_QPCNT … #define IRDMA_COMMIT_FPM_BASE_S … #define IRDMA_CQPSQ_CFPM_HMCFNID … #define IRDMA_CQPSQ_FWQE_AECODE … #define IRDMA_CQPSQ_FWQE_AESOURCE … #define IRDMA_CQPSQ_FWQE_RQMNERR … #define IRDMA_CQPSQ_FWQE_RQMJERR … #define IRDMA_CQPSQ_FWQE_SQMNERR … #define IRDMA_CQPSQ_FWQE_SQMJERR … #define IRDMA_CQPSQ_FWQE_QPID … #define IRDMA_CQPSQ_FWQE_GENERATE_AE … #define IRDMA_CQPSQ_FWQE_USERFLCODE … #define IRDMA_CQPSQ_FWQE_FLUSHSQ … #define IRDMA_CQPSQ_FWQE_FLUSHRQ … #define IRDMA_CQPSQ_MAPT_PORT … #define IRDMA_CQPSQ_MAPT_ADDPORT … #define IRDMA_CQPSQ_UPESD_SDCMD … #define IRDMA_CQPSQ_UPESD_SDDATALOW … #define IRDMA_CQPSQ_UPESD_SDDATAHI … #define IRDMA_CQPSQ_UPESD_HMCFNID … #define IRDMA_CQPSQ_UPESD_ENTRY_VALID … #define IRDMA_CQPSQ_UPESD_BM_PF … #define IRDMA_CQPSQ_UPESD_BM_CP_LM … #define IRDMA_CQPSQ_UPESD_BM_AXF … #define IRDMA_CQPSQ_UPESD_BM_LM … #define IRDMA_CQPSQ_UPESD_BM … #define IRDMA_CQPSQ_UPESD_ENTRY_COUNT … #define IRDMA_CQPSQ_UPESD_SKIP_ENTRY … #define IRDMA_CQPSQ_SUSPENDQP_QPID … #define IRDMA_CQPSQ_RESUMEQP_QSHANDLE … #define IRDMA_CQPSQ_RESUMEQP_QPID … #define IRDMA_CQPSQ_MIN_STAG_INVALID … #define IRDMA_CQPSQ_MIN_SUSPEND_PND … #define IRDMA_CQPSQ_MAJ_NO_ERROR … #define IRDMA_CQPSQ_MAJ_OBJCACHE_ERROR … #define IRDMA_CQPSQ_MAJ_CNTXTCACHE_ERROR … #define IRDMA_CQPSQ_MAJ_ERROR … #define IRDMAQPC_DDP_VER … #define IRDMAQPC_IBRDENABLE … #define IRDMAQPC_IPV4 … #define IRDMAQPC_NONAGLE … #define IRDMAQPC_INSERTVLANTAG … #define IRDMAQPC_ISQP1 … #define IRDMAQPC_TIMESTAMP … #define IRDMAQPC_RQWQESIZE … #define IRDMAQPC_INSERTL2TAG2 … #define IRDMAQPC_LIMIT … #define IRDMAQPC_ECN_EN … #define IRDMAQPC_DROPOOOSEG … #define IRDMAQPC_DUPACK_THRESH … #define IRDMAQPC_ERR_RQ_IDX_VALID … #define IRDMAQPC_DIS_VLAN_CHECKS … #define IRDMAQPC_DC_TCP_EN … #define IRDMAQPC_RCVTPHEN … #define IRDMAQPC_XMITTPHEN … #define IRDMAQPC_RQTPHEN … #define IRDMAQPC_SQTPHEN … #define IRDMAQPC_PPIDX … #define IRDMAQPC_PMENA … #define IRDMAQPC_RDMAP_VER … #define IRDMAQPC_ROCE_TVER … #define IRDMAQPC_SQADDR … #define IRDMAQPC_RQADDR … #define IRDMAQPC_TTL … #define IRDMAQPC_RQSIZE … #define IRDMAQPC_SQSIZE … #define IRDMAQPC_GEN1_SRCMACADDRIDX … #define IRDMAQPC_AVOIDSTRETCHACK … #define IRDMAQPC_TOS … #define IRDMAQPC_SRCPORTNUM … #define IRDMAQPC_DESTPORTNUM … #define IRDMAQPC_DESTIPADDR0 … #define IRDMAQPC_DESTIPADDR1 … #define IRDMAQPC_DESTIPADDR2 … #define IRDMAQPC_DESTIPADDR3 … #define IRDMAQPC_SNDMSS … #define IRDMAQPC_SYN_RST_HANDLING … #define IRDMAQPC_VLANTAG … #define IRDMAQPC_ARPIDX … #define IRDMAQPC_FLOWLABEL … #define IRDMAQPC_WSCALE … #define IRDMAQPC_KEEPALIVE … #define IRDMAQPC_IGNORE_TCP_OPT … #define IRDMAQPC_IGNORE_TCP_UNS_OPT … #define IRDMAQPC_TCPSTATE … #define IRDMAQPC_RCVSCALE … #define IRDMAQPC_SNDSCALE … #define IRDMAQPC_PDIDX … #define IRDMAQPC_PDIDXHI … #define IRDMAQPC_PKEY … #define IRDMAQPC_ACKCREDITS … #define IRDMAQPC_QKEY … #define IRDMAQPC_DESTQP … #define IRDMAQPC_KALIVE_TIMER_MAX_PROBES … #define IRDMAQPC_KEEPALIVE_INTERVAL … #define IRDMAQPC_TIMESTAMP_RECENT … #define IRDMAQPC_TIMESTAMP_AGE … #define IRDMAQPC_SNDNXT … #define IRDMAQPC_ISN … #define IRDMAQPC_PSNNXT … #define IRDMAQPC_LSN … #define IRDMAQPC_SNDWND … #define IRDMAQPC_RCVNXT … #define IRDMAQPC_EPSN … #define IRDMAQPC_RCVWND … #define IRDMAQPC_SNDMAX … #define IRDMAQPC_SNDUNA … #define IRDMAQPC_PSNMAX … #define IRDMAQPC_PSNUNA … #define IRDMAQPC_SRTT … #define IRDMAQPC_RTTVAR … #define IRDMAQPC_SSTHRESH … #define IRDMAQPC_CWND … #define IRDMAQPC_CWNDROCE … #define IRDMAQPC_SNDWL1 … #define IRDMAQPC_SNDWL2 … #define IRDMAQPC_ERR_RQ_IDX … #define IRDMAQPC_RTOMIN … #define IRDMAQPC_MAXSNDWND … #define IRDMAQPC_REXMIT_THRESH … #define IRDMAQPC_RNRNAK_THRESH … #define IRDMAQPC_TXCQNUM … #define IRDMAQPC_RXCQNUM … #define IRDMAQPC_STAT_INDEX … #define IRDMAQPC_Q2ADDR … #define IRDMAQPC_LASTBYTESENT … #define IRDMAQPC_MACADDRESS … #define IRDMAQPC_ORDSIZE … #define IRDMAQPC_IRDSIZE … #define IRDMAQPC_UDPRIVCQENABLE … #define IRDMAQPC_WRRDRSPOK … #define IRDMAQPC_RDOK … #define IRDMAQPC_SNDMARKERS … #define IRDMAQPC_DCQCNENABLE … #define IRDMAQPC_FW_CC_ENABLE … #define IRDMAQPC_RCVNOICRC … #define IRDMAQPC_BINDEN … #define IRDMAQPC_FASTREGEN … #define IRDMAQPC_PRIVEN … #define IRDMAQPC_TIMELYENABLE … #define IRDMAQPC_THIGH … #define IRDMAQPC_TLOW … #define IRDMAQPC_REMENDPOINTIDX … #define IRDMAQPC_USESTATSINSTANCE … #define IRDMAQPC_IWARPMODE … #define IRDMAQPC_RCVMARKERS … #define IRDMAQPC_ALIGNHDRS … #define IRDMAQPC_RCVNOMPACRC … #define IRDMAQPC_RCVMARKOFFSET … #define IRDMAQPC_SNDMARKOFFSET … #define IRDMAQPC_QPCOMPCTX … #define IRDMAQPC_SQTPHVAL … #define IRDMAQPC_RQTPHVAL … #define IRDMAQPC_QSHANDLE … #define IRDMAQPC_EXCEPTION_LAN_QUEUE … #define IRDMAQPC_LOCAL_IPADDR3 … #define IRDMAQPC_LOCAL_IPADDR2 … #define IRDMAQPC_LOCAL_IPADDR1 … #define IRDMAQPC_LOCAL_IPADDR0 … #define IRDMA_FW_VER_MINOR … #define IRDMA_FW_VER_MAJOR … #define IRDMA_FEATURE_INFO … #define IRDMA_FEATURE_CNT … #define IRDMA_FEATURE_TYPE … #define IRDMAQPSQ_OPCODE … #define IRDMAQPSQ_COPY_HOST_PBL … #define IRDMAQPSQ_ADDFRAGCNT … #define IRDMAQPSQ_PUSHWQE … #define IRDMAQPSQ_STREAMMODE … #define IRDMAQPSQ_WAITFORRCVPDU … #define IRDMAQPSQ_READFENCE … #define IRDMAQPSQ_LOCALFENCE … #define IRDMAQPSQ_UDPHEADER … #define IRDMAQPSQ_L4LEN … #define IRDMAQPSQ_SIGCOMPL … #define IRDMAQPSQ_VALID … #define IRDMAQPSQ_FRAG_TO … #define IRDMAQPSQ_FRAG_VALID … #define IRDMAQPSQ_FRAG_LEN … #define IRDMAQPSQ_FRAG_STAG … #define IRDMAQPSQ_GEN1_FRAG_LEN … #define IRDMAQPSQ_GEN1_FRAG_STAG … #define IRDMAQPSQ_REMSTAGINV … #define IRDMAQPSQ_DESTQKEY … #define IRDMAQPSQ_DESTQPN … #define IRDMAQPSQ_AHID … #define IRDMAQPSQ_INLINEDATAFLAG … #define IRDMA_INLINE_VALID_S … #define IRDMAQPSQ_INLINEDATALEN … #define IRDMAQPSQ_IMMDATAFLAG … #define IRDMAQPSQ_REPORTRTT … #define IRDMAQPSQ_IMMDATA … #define IRDMAQPSQ_REMSTAG … #define IRDMAQPSQ_REMTO … #define IRDMAQPSQ_STAGRIGHTS … #define IRDMAQPSQ_VABASEDTO … #define IRDMAQPSQ_MEMWINDOWTYPE … #define IRDMAQPSQ_MWLEN … #define IRDMAQPSQ_PARENTMRSTAG … #define IRDMAQPSQ_MWSTAG … #define IRDMAQPSQ_BASEVA_TO_FBO … #define IRDMAQPSQ_LOCSTAG … #define IRDMAQPSQ_STAGKEY … #define IRDMAQPSQ_STAGINDEX … #define IRDMAQPSQ_COPYHOSTPBLS … #define IRDMAQPSQ_LPBLSIZE … #define IRDMAQPSQ_HPAGESIZE … #define IRDMAQPSQ_STAGLEN … #define IRDMAQPSQ_FIRSTPMPBLIDXLO … #define IRDMAQPSQ_FIRSTPMPBLIDXHI … #define IRDMAQPSQ_PBLADDR … /* iwarp QP RQ WQE common fields */ #define IRDMAQPRQ_ADDFRAGCNT … #define IRDMAQPRQ_VALID … #define IRDMAQPRQ_COMPLCTX … #define IRDMAQPRQ_FRAG_LEN … #define IRDMAQPRQ_STAG … #define IRDMAQPRQ_TO … #define IRDMAPFINT_OICR_HMC_ERR_M … #define IRDMAPFINT_OICR_PE_PUSH_M … #define IRDMAPFINT_OICR_PE_CRITERR_M … #define IRDMA_QUERY_FPM_MAX_QPS … #define IRDMA_QUERY_FPM_MAX_CQS … #define IRDMA_QUERY_FPM_FIRST_PE_SD_INDEX … #define IRDMA_QUERY_FPM_MAX_PE_SDS … #define IRDMA_QUERY_FPM_MAX_CEQS … #define IRDMA_QUERY_FPM_XFBLOCKSIZE … #define IRDMA_QUERY_FPM_Q1BLOCKSIZE … #define IRDMA_QUERY_FPM_HTMULTIPLIER … #define IRDMA_QUERY_FPM_TIMERBUCKET … #define IRDMA_QUERY_FPM_RRFBLOCKSIZE … #define IRDMA_QUERY_FPM_RRFFLBLOCKSIZE … #define IRDMA_QUERY_FPM_OOISCFBLOCKSIZE … #define IRDMA_SHMC_PAGE_ALLOCATED_HMC_FN_ID … #define IRDMA_GET_CURRENT_AEQ_ELEM(_aeq) … #define IRDMA_GET_CURRENT_CEQ_ELEM(_ceq) … #define IRDMA_GET_CEQ_ELEM_AT_POS(_ceq, _pos) … #define IRDMA_RING_GET_NEXT_TAIL(_ring, _idx) … #define IRDMA_CQP_INIT_WQE(wqe) … #define IRDMA_GET_CURRENT_CQ_ELEM(_cq) … #define IRDMA_GET_CURRENT_EXTENDED_CQ_ELEM(_cq) … #define IRDMA_RING_INIT(_ring, _size) … #define IRDMA_RING_SIZE(_ring) … #define IRDMA_RING_CURRENT_HEAD(_ring) … #define IRDMA_RING_CURRENT_TAIL(_ring) … #define IRDMA_RING_MOVE_HEAD(_ring, _retcode) … #define IRDMA_RING_MOVE_HEAD_BY_COUNT(_ring, _count, _retcode) … #define IRDMA_SQ_RING_MOVE_HEAD(_ring, _retcode) … #define IRDMA_SQ_RING_MOVE_HEAD_BY_COUNT(_ring, _count, _retcode) … #define IRDMA_RING_MOVE_HEAD_BY_COUNT_NOCHECK(_ring, _count) … #define IRDMA_RING_MOVE_TAIL(_ring) … #define IRDMA_RING_MOVE_HEAD_NOCHECK(_ring) … #define IRDMA_RING_MOVE_TAIL_BY_COUNT(_ring, _count) … #define IRDMA_RING_SET_TAIL(_ring, _pos) … #define IRDMA_RING_FULL_ERR(_ring) … #define IRDMA_ERR_RING_FULL2(_ring) … #define IRDMA_ERR_RING_FULL3(_ring) … #define IRDMA_SQ_RING_FULL_ERR(_ring) … #define IRDMA_ERR_SQ_RING_FULL2(_ring) … #define IRDMA_ERR_SQ_RING_FULL3(_ring) … #define IRDMA_RING_MORE_WORK(_ring) … #define IRDMA_RING_USED_QUANTA(_ring) … #define IRDMA_RING_FREE_QUANTA(_ring) … #define IRDMA_SQ_RING_FREE_QUANTA(_ring) … #define IRDMA_ATOMIC_RING_MOVE_HEAD(_ring, index, _retcode) … enum irdma_qp_wqe_size { … }; enum irdma_ws_node_op { … }; enum { … }; enum irdma_alignment { … }; enum icrdma_protocol_used { … }; /** * set_64bit_val - set 64 bit value to hw wqe * @wqe_words: wqe addr to write * @byte_index: index in wqe * @val: value to write **/ static inline void set_64bit_val(__le64 *wqe_words, u32 byte_index, u64 val) { … } /** * set_32bit_val - set 32 bit value to hw wqe * @wqe_words: wqe addr to write * @byte_index: index in wqe * @val: value to write **/ static inline void set_32bit_val(__le32 *wqe_words, u32 byte_index, u32 val) { … } /** * get_64bit_val - read 64 bit value from wqe * @wqe_words: wqe addr * @byte_index: index to read from * @val: read value **/ static inline void get_64bit_val(__le64 *wqe_words, u32 byte_index, u64 *val) { … } /** * get_32bit_val - read 32 bit value from wqe * @wqe_words: wqe addr * @byte_index: index to reaad from * @val: return 32 bit value **/ static inline void get_32bit_val(__le32 *wqe_words, u32 byte_index, u32 *val) { … } #endif /* IRDMA_DEFS_H */
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