linux/drivers/clk/ingenic/jz4740-cgu.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Ingenic JZ4740 SoC CGU driver
 *
 * Copyright (c) 2015 Imagination Technologies
 * Author: Paul Burton <[email protected]>
 */

#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/of.h>

#include <dt-bindings/clock/ingenic,jz4740-cgu.h>

#include "cgu.h"
#include "pm.h"

/* CGU register offsets */
#define CGU_REG_CPCCR …
#define CGU_REG_LCR …
#define CGU_REG_CPPCR …
#define CGU_REG_CLKGR …
#define CGU_REG_SCR …
#define CGU_REG_I2SCDR …
#define CGU_REG_LPCDR …
#define CGU_REG_MSCCDR …
#define CGU_REG_UHCCDR …
#define CGU_REG_SSICDR …

/* bits within a PLL control register */
#define PLLCTL_M_SHIFT …
#define PLLCTL_M_MASK …
#define PLLCTL_N_SHIFT …
#define PLLCTL_N_MASK …
#define PLLCTL_OD_SHIFT …
#define PLLCTL_OD_MASK …
#define PLLCTL_STABLE …
#define PLLCTL_BYPASS …
#define PLLCTL_ENABLE …

/* bits within the LCR register */
#define LCR_SLEEP …

/* bits within the CLKGR register */
#define CLKGR_UDC …

static struct ingenic_cgu *cgu;

static const s8 pll_od_encoding[4] = …;

static const u8 jz4740_cgu_cpccr_div_table[] = …;

static const u8 jz4740_cgu_pll_half_div_table[] = …;

static const struct ingenic_cgu_clk_info jz4740_cgu_clocks[] = …;

static void __init jz4740_cgu_init(struct device_node *np)
{ … }
CLK_OF_DECLARE_DRIVER(jz4740_cgu, "ingenic,jz4740-cgu", jz4740_cgu_init);