linux/drivers/infiniband/hw/hfi1/qsfp.h

/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/*
 * Copyright(c) 2015, 2016 Intel Corporation.
 */
/* QSFP support common definitions, for hfi driver */

#define QSFP_DEV
#define QSFP_PWR_LAG_MSEC
#define QSFP_MODPRS_LAG_MSEC
/* 128 byte pages, per SFF 8636 rev 2.4 */
#define QSFP_MAX_NUM_PAGES

/*
 * Below are masks for QSFP pins.  Pins are the same for HFI0 and HFI1.
 * _N means asserted low
 */
#define QSFP_HFI0_I2CCLK
#define QSFP_HFI0_I2CDAT
#define QSFP_HFI0_RESET_N
#define QSFP_HFI0_INT_N
#define QSFP_HFI0_MODPRST_N

/* QSFP is paged at 256 bytes */
#define QSFP_PAGESIZE
/* Reads/writes cannot cross 128 byte boundaries */
#define QSFP_RW_BOUNDARY

/* number of bytes in i2c offset for QSFP devices */
#define __QSFP_OFFSET_SIZE
#define QSFP_OFFSET_SIZE

/* Defined fields that Intel requires of qualified cables */
/* Byte 0 is Identifier, not checked */
/* Byte 1 is reserved "status MSB" */
#define QSFP_MONITOR_VAL_START
#define QSFP_MONITOR_VAL_END
#define QSFP_MONITOR_RANGE
#define QSFP_TX_CTRL_BYTE_OFFS
#define QSFP_PWR_CTRL_BYTE_OFFS
#define QSFP_CDR_CTRL_BYTE_OFFS

#define QSFP_PAGE_SELECT_BYTE_OFFS
/* Byte 128 is Identifier: must be 0x0c for QSFP, or 0x0d for QSFP+ */
#define QSFP_MOD_ID_OFFS
/*
 * Byte 129 is "Extended Identifier".
 * For bits [7:6]: 0:1.5W, 1:2.0W, 2:2.5W, 3:3.5W
 * For bits [1:0]: 0:Unused, 1:4W, 2:4.5W, 3:5W
 */
#define QSFP_MOD_PWR_OFFS
/* Byte 130 is Connector type. Not Intel req'd */
/* Bytes 131..138 are Transceiver types, bit maps for various tech, none IB */
/* Byte 139 is encoding. code 0x01 is 8b10b. Not Intel req'd */
/* byte 140 is nominal bit-rate, in units of 100Mbits/sec */
#define QSFP_NOM_BIT_RATE_100_OFFS
/* Byte 141 is Extended Rate Select. Not Intel req'd */
/* Bytes 142..145 are lengths for various fiber types. Not Intel req'd */
/* Byte 146 is length for Copper. Units of 1 meter */
#define QSFP_MOD_LEN_OFFS
/*
 * Byte 147 is Device technology. D0..3 not Intel req'd
 * D4..7 select from 15 choices, translated by table:
 */
#define QSFP_MOD_TECH_OFFS
extern const char *const hfi1_qsfp_devtech[16];
/* Active Equalization includes fiber, copper full EQ, and copper near Eq */
#define QSFP_IS_ACTIVE(tech)
/* Active Equalization includes fiber, copper full EQ, and copper far Eq */
#define QSFP_IS_ACTIVE_FAR(tech)
/* Attenuation should be valid for copper other than full/near Eq */
#define QSFP_HAS_ATTEN(tech)
/* Length is only valid if technology is "copper" */
#define QSFP_IS_CU(tech)
#define QSFP_TECH_1490

#define QSFP_OUI(oui)
#define QSFP_OUI_AMPHENOL
#define QSFP_OUI_FINISAR
#define QSFP_OUI_GORE

/* Bytes 148..163 are Vendor Name, Left-justified Blank-filled */
#define QSFP_VEND_OFFS
#define QSFP_VEND_LEN
/* Byte 164 is IB Extended transceiver codes Bits D0..3 are SDR,DDR,QDR,EDR */
#define QSFP_IBXCV_OFFS
/* Bytes 165..167 are Vendor OUI number */
#define QSFP_VOUI_OFFS
#define QSFP_VOUI_LEN
/* Bytes 168..183 are Vendor Part Number, string */
#define QSFP_PN_OFFS
#define QSFP_PN_LEN
/* Bytes 184,185 are Vendor Rev. Left Justified, Blank-filled */
#define QSFP_REV_OFFS
#define QSFP_REV_LEN
/*
 * Bytes 186,187 are Wavelength, if Optical. Not Intel req'd
 *  If copper, they are attenuation in dB:
 * Byte 186 is at 2.5Gb/sec (SDR), Byte 187 at 5.0Gb/sec (DDR)
 */
#define QSFP_ATTEN_OFFS
#define QSFP_ATTEN_LEN
/*
 * Bytes 188,189 are Wavelength tolerance, if optical
 * If copper, they are attenuation in dB:
 * Byte 188 is at 12.5 Gb/s, Byte 189 at 25 Gb/s
 */
#define QSFP_CU_ATTEN_7G_OFFS
#define QSFP_CU_ATTEN_12G_OFFS
/* Byte 190 is Max Case Temp. Not Intel req'd */
/* Byte 191 is LSB of sum of bytes 128..190. Not Intel req'd */
#define QSFP_CC_OFFS
#define QSFP_EQ_INFO_OFFS
#define QSFP_CDR_INFO_OFFS
/* Bytes 196..211 are Serial Number, String */
#define QSFP_SN_OFFS
#define QSFP_SN_LEN
/* Bytes 212..219 are date-code YYMMDD (MM==1 for Jan) */
#define QSFP_DATE_OFFS
#define QSFP_DATE_LEN
/* Bytes 218,219 are optional lot-code, string */
#define QSFP_LOT_OFFS
#define QSFP_LOT_LEN
/* Bytes 220, 221 indicate monitoring options, Not Intel req'd */
/* Byte 222 indicates nominal bitrate in units of 250Mbits/sec */
#define QSFP_NOM_BIT_RATE_250_OFFS
/* Byte 223 is LSB of sum of bytes 192..222 */
#define QSFP_CC_EXT_OFFS

/*
 * Interrupt flag masks
 */
#define QSFP_DATA_NOT_READY

#define QSFP_HIGH_TEMP_ALARM
#define QSFP_LOW_TEMP_ALARM
#define QSFP_HIGH_TEMP_WARNING
#define QSFP_LOW_TEMP_WARNING

#define QSFP_HIGH_VCC_ALARM
#define QSFP_LOW_VCC_ALARM
#define QSFP_HIGH_VCC_WARNING
#define QSFP_LOW_VCC_WARNING

#define QSFP_HIGH_POWER_ALARM
#define QSFP_LOW_POWER_ALARM
#define QSFP_HIGH_POWER_WARNING
#define QSFP_LOW_POWER_WARNING

#define QSFP_HIGH_BIAS_ALARM
#define QSFP_LOW_BIAS_ALARM
#define QSFP_HIGH_BIAS_WARNING
#define QSFP_LOW_BIAS_WARNING

#define QSFP_ATTEN_SDR(attenarray)
#define QSFP_ATTEN_DDR(attenarray)

/*
 * struct qsfp_data encapsulates state of QSFP device for one port.
 * it will be part of port-specific data if a board supports QSFP.
 *
 * Since multiple board-types use QSFP, and their pport_data structs
 * differ (in the chip-specific section), we need a pointer to its head.
 *
 * Avoiding premature optimization, we will have one work_struct per port,
 * and let the qsfp_lock arbitrate access to common resources.
 *
 */
struct qsfp_data {};

int refresh_qsfp_cache(struct hfi1_pportdata *ppd,
		       struct qsfp_data *cp);
int get_qsfp_power_class(u8 power_byte);
int qsfp_mod_present(struct hfi1_pportdata *ppd);
int get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr,
		   u32 len, u8 *data);

int i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr,
	      int offset, void *bp, int len);
int i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr,
	     int offset, void *bp, int len);
int qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
	       int len);
int qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
	      int len);
int one_qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
		   int len);
int one_qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
		  int len);
struct hfi1_asic_data;
int set_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad);
void clean_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad);