/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* * Copyright(c) 2015, 2016 Intel Corporation. */ #ifndef __PLATFORM_H #define __PLATFORM_H #define METADATA_TABLE_FIELD_START_SHIFT … #define METADATA_TABLE_FIELD_START_LEN_BITS … #define METADATA_TABLE_FIELD_LEN_SHIFT … #define METADATA_TABLE_FIELD_LEN_LEN_BITS … /* Header structure */ #define PLATFORM_CONFIG_HEADER_RECORD_IDX_SHIFT … #define PLATFORM_CONFIG_HEADER_RECORD_IDX_LEN_BITS … #define PLATFORM_CONFIG_HEADER_TABLE_LENGTH_SHIFT … #define PLATFORM_CONFIG_HEADER_TABLE_LENGTH_LEN_BITS … #define PLATFORM_CONFIG_HEADER_TABLE_TYPE_SHIFT … #define PLATFORM_CONFIG_HEADER_TABLE_TYPE_LEN_BITS … enum platform_config_table_type_encoding { … }; enum platform_config_system_table_fields { … }; enum platform_config_port_table_fields { … }; enum platform_config_rx_preset_table_fields { … }; enum platform_config_tx_preset_table_fields { … }; enum platform_config_qsfp_attn_table_fields { … }; enum platform_config_variable_settings_table_fields { … }; struct platform_config { … }; struct platform_config_data { … }; /* * This struct acts as a quick reference into the platform_data binary image * and is populated by parse_platform_config(...) depending on the specific * META_VERSION */ struct platform_config_cache { … }; /* This section defines default values and encodings for the * fields defined for each table above */ /* * ===================================================== * System table encodings * ===================================================== */ #define PLATFORM_CONFIG_MAGIC_NUM … #define PLATFORM_CONFIG_MAGIC_NUMBER_LEN … /* * These power classes are the same as defined in SFF 8636 spec rev 2.4 * describing byte 129 in table 6-16, except enumerated in a different order */ enum platform_config_qsfp_power_class_encoding { … }; /* * ==================================================== * Port table encodings * ==================================================== */ enum platform_config_port_type_encoding { … }; enum platform_config_link_speed_supported_encoding { … }; /* * This is a subset (not strict) of the link downgrades * supported. The link downgrades supported are expected * to be supplied to the driver by another entity such as * the fabric manager */ enum platform_config_link_width_supported_encoding { … }; enum platform_config_virtual_lane_capability_encoding { … }; /* Max MTU */ enum platform_config_mtu_capability_encoding { … }; enum platform_config_local_max_timeout_encoding { … }; enum link_tuning_encoding { … }; /* * Shifts and masks for the link SI tuning values stuffed into the ASIC scratch * registers for integrated platforms */ #define PORT0_PORT_TYPE_SHIFT … #define PORT0_LOCAL_ATTEN_SHIFT … #define PORT0_REMOTE_ATTEN_SHIFT … #define PORT0_DEFAULT_ATTEN_SHIFT … #define PORT1_PORT_TYPE_SHIFT … #define PORT1_LOCAL_ATTEN_SHIFT … #define PORT1_REMOTE_ATTEN_SHIFT … #define PORT1_DEFAULT_ATTEN_SHIFT … #define PORT0_PORT_TYPE_MASK … #define PORT0_LOCAL_ATTEN_MASK … #define PORT0_REMOTE_ATTEN_MASK … #define PORT0_DEFAULT_ATTEN_MASK … #define PORT1_PORT_TYPE_MASK … #define PORT1_LOCAL_ATTEN_MASK … #define PORT1_REMOTE_ATTEN_MASK … #define PORT1_DEFAULT_ATTEN_MASK … #define PORT0_PORT_TYPE_SMASK … #define PORT0_LOCAL_ATTEN_SMASK … #define PORT0_REMOTE_ATTEN_SMASK … #define PORT0_DEFAULT_ATTEN_SMASK … #define PORT1_PORT_TYPE_SMASK … #define PORT1_LOCAL_ATTEN_SMASK … #define PORT1_REMOTE_ATTEN_SMASK … #define PORT1_DEFAULT_ATTEN_SMASK … #define QSFP_MAX_POWER_SHIFT … #define TX_NO_EQ_SHIFT … #define TX_EQ_SHIFT … #define RX_SHIFT … #define QSFP_MAX_POWER_MASK … #define TX_NO_EQ_MASK … #define TX_EQ_MASK … #define RX_MASK … #define QSFP_MAX_POWER_SMASK … #define TX_NO_EQ_SMASK … #define TX_EQ_SMASK … #define RX_SMASK … #define TX_PRECUR_SHIFT … #define TX_ATTN_SHIFT … #define QSFP_TX_CDR_APPLY_SHIFT … #define QSFP_TX_EQ_APPLY_SHIFT … #define QSFP_TX_CDR_SHIFT … #define QSFP_TX_EQ_SHIFT … #define TX_POSTCUR_SHIFT … #define TX_PRECUR_MASK … #define TX_ATTN_MASK … #define QSFP_TX_CDR_APPLY_MASK … #define QSFP_TX_EQ_APPLY_MASK … #define QSFP_TX_CDR_MASK … #define QSFP_TX_EQ_MASK … #define TX_POSTCUR_MASK … #define TX_PRECUR_SMASK … #define TX_ATTN_SMASK … #define QSFP_TX_CDR_APPLY_SMASK … #define QSFP_TX_EQ_APPLY_SMASK … #define QSFP_TX_CDR_SMASK … #define QSFP_TX_EQ_SMASK … #define TX_POSTCUR_SMASK … #define QSFP_RX_CDR_APPLY_SHIFT … #define QSFP_RX_EMP_APPLY_SHIFT … #define QSFP_RX_AMP_APPLY_SHIFT … #define QSFP_RX_CDR_SHIFT … #define QSFP_RX_EMP_SHIFT … #define QSFP_RX_AMP_SHIFT … #define QSFP_RX_CDR_APPLY_MASK … #define QSFP_RX_EMP_APPLY_MASK … #define QSFP_RX_AMP_APPLY_MASK … #define QSFP_RX_CDR_MASK … #define QSFP_RX_EMP_MASK … #define QSFP_RX_AMP_MASK … #define QSFP_RX_CDR_APPLY_SMASK … #define QSFP_RX_EMP_APPLY_SMASK … #define QSFP_RX_AMP_APPLY_SMASK … #define QSFP_RX_CDR_SMASK … #define QSFP_RX_EMP_SMASK … #define QSFP_RX_AMP_SMASK … #define BITMAP_VERSION … #define BITMAP_VERSION_SHIFT … #define BITMAP_VERSION_MASK … #define BITMAP_VERSION_SMASK … #define CHECKSUM_SHIFT … #define CHECKSUM_MASK … #define CHECKSUM_SMASK … /* platform.c */ void get_platform_config(struct hfi1_devdata *dd); void free_platform_config(struct hfi1_devdata *dd); void get_port_type(struct hfi1_pportdata *ppd); int set_qsfp_tx(struct hfi1_pportdata *ppd, int on); void tune_serdes(struct hfi1_pportdata *ppd); #endif /*__PLATFORM_H*/
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