linux/include/dt-bindings/clock/ingenic,jz4760-cgu.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * This header provides clock numbers for the ingenic,jz4760-cgu DT binding.
 */

#ifndef __DT_BINDINGS_CLOCK_JZ4760_CGU_H__
#define __DT_BINDINGS_CLOCK_JZ4760_CGU_H__

#define JZ4760_CLK_EXT …
#define JZ4760_CLK_OSC32K …
#define JZ4760_CLK_PLL0 …
#define JZ4760_CLK_PLL0_HALF …
#define JZ4760_CLK_PLL1 …
#define JZ4760_CLK_CCLK …
#define JZ4760_CLK_HCLK …
#define JZ4760_CLK_SCLK …
#define JZ4760_CLK_H2CLK …
#define JZ4760_CLK_MCLK …
#define JZ4760_CLK_PCLK …
#define JZ4760_CLK_MMC_MUX …
#define JZ4760_CLK_MMC0 …
#define JZ4760_CLK_MMC1 …
#define JZ4760_CLK_MMC2 …
#define JZ4760_CLK_CIM …
#define JZ4760_CLK_UHC …
#define JZ4760_CLK_GPU …
#define JZ4760_CLK_GPS …
#define JZ4760_CLK_SSI_MUX …
#define JZ4760_CLK_PCM …
#define JZ4760_CLK_I2S …
#define JZ4760_CLK_OTG …
#define JZ4760_CLK_SSI0 …
#define JZ4760_CLK_SSI1 …
#define JZ4760_CLK_SSI2 …
#define JZ4760_CLK_DMA …
#define JZ4760_CLK_I2C0 …
#define JZ4760_CLK_I2C1 …
#define JZ4760_CLK_UART0 …
#define JZ4760_CLK_UART1 …
#define JZ4760_CLK_UART2 …
#define JZ4760_CLK_UART3 …
#define JZ4760_CLK_IPU …
#define JZ4760_CLK_ADC …
#define JZ4760_CLK_AIC …
#define JZ4760_CLK_VPU …
#define JZ4760_CLK_UHC_PHY …
#define JZ4760_CLK_OTG_PHY …
#define JZ4760_CLK_EXT512 …
#define JZ4760_CLK_RTC …
#define JZ4760_CLK_LPCLK_DIV …
#define JZ4760_CLK_TVE …
#define JZ4760_CLK_LPCLK …
#define JZ4760_CLK_MDMA …
#define JZ4760_CLK_BDMA …

#endif /* __DT_BINDINGS_CLOCK_JZ4760_CGU_H__ */