#ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
#define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
#define JZ4755_CLK_EXT …
#define JZ4755_CLK_OSC32K …
#define JZ4755_CLK_PLL …
#define JZ4755_CLK_PLL_HALF …
#define JZ4755_CLK_EXT_HALF …
#define JZ4755_CLK_CCLK …
#define JZ4755_CLK_H0CLK …
#define JZ4755_CLK_PCLK …
#define JZ4755_CLK_MCLK …
#define JZ4755_CLK_H1CLK …
#define JZ4755_CLK_UDC …
#define JZ4755_CLK_LCD …
#define JZ4755_CLK_UART0 …
#define JZ4755_CLK_UART1 …
#define JZ4755_CLK_UART2 …
#define JZ4755_CLK_DMA …
#define JZ4755_CLK_MMC …
#define JZ4755_CLK_MMC0 …
#define JZ4755_CLK_MMC1 …
#define JZ4755_CLK_EXT512 …
#define JZ4755_CLK_RTC …
#define JZ4755_CLK_UDC_PHY …
#define JZ4755_CLK_I2S …
#define JZ4755_CLK_SPI …
#define JZ4755_CLK_AIC …
#define JZ4755_CLK_ADC …
#define JZ4755_CLK_TCU …
#define JZ4755_CLK_BCH …
#define JZ4755_CLK_I2C …
#define JZ4755_CLK_TVE …
#define JZ4755_CLK_CIM …
#define JZ4755_CLK_AUX_CPU …
#define JZ4755_CLK_AHB1 …
#define JZ4755_CLK_IDCT …
#define JZ4755_CLK_DB …
#define JZ4755_CLK_ME …
#define JZ4755_CLK_MC …
#define JZ4755_CLK_TSSI …
#define JZ4755_CLK_IPU …
#endif