/* * Broadcom NetXtreme-E RoCE driver. * * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term * Broadcom refers to Broadcom Limited and/or its subsidiaries. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * BSD license below: * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Description: RDMA Controller HW interface (header) */ #ifndef __BNXT_QPLIB_RCFW_H__ #define __BNXT_QPLIB_RCFW_H__ #include "qplib_tlv.h" #define RCFW_CMDQ_TRIG_VAL … #define RCFW_COMM_PCI_BAR_REGION … #define RCFW_COMM_CONS_PCI_BAR_REGION … #define RCFW_COMM_BASE_OFFSET … #define RCFW_PF_VF_COMM_PROD_OFFSET … #define RCFW_COMM_TRIG_OFFSET … #define RCFW_COMM_SIZE … #define RCFW_DBR_PCI_BAR_REGION … #define RCFW_DBR_BASE_PAGE_SHIFT … #define RCFW_FW_STALL_MAX_TIMEOUT … /* Cmdq contains a fix number of a 16-Byte slots */ struct bnxt_qplib_cmdqe { … }; #define BNXT_QPLIB_CMDQE_UNITS … static inline void bnxt_qplib_rcfw_cmd_prep(struct cmdq_base *req, u8 opcode, u8 cmd_size) { … } /* Shadow queue depth for non blocking command */ #define RCFW_CMD_NON_BLOCKING_SHADOW_QD … #define RCFW_CMD_WAIT_TIME_MS … /* CMDQ elements */ #define BNXT_QPLIB_CMDQE_MAX_CNT … #define BNXT_QPLIB_CMDQE_BYTES(depth) … static inline u32 bnxt_qplib_cmdqe_npages(u32 depth) { … } static inline u32 bnxt_qplib_cmdqe_page_size(u32 depth) { … } /* Get the number of command units required for the req. The * function returns correct value only if called before * setting using bnxt_qplib_set_cmd_slots */ static inline u32 bnxt_qplib_get_cmd_slots(struct cmdq_base *req) { … } static inline u32 bnxt_qplib_set_cmd_slots(struct cmdq_base *req) { … } #define RCFW_MAX_COOKIE_VALUE … #define RCFW_CMD_IS_BLOCKING … #define HWRM_VERSION_DEV_ATTR_MAX_DPI … /* Crsq buf is 1024-Byte */ struct bnxt_qplib_crsbe { … }; /* CREQ */ /* Allocate 1 per QP for async error notification for now */ #define BNXT_QPLIB_CREQE_MAX_CNT … #define BNXT_QPLIB_CREQE_UNITS … #define CREQ_CMP_VALID(hdr, pass) … #define CREQ_ENTRY_POLL_BUDGET … /* HWQ */ aeq_handler_t; struct bnxt_qplib_crsqe { … }; struct bnxt_qplib_rcfw_sbuf { … }; struct bnxt_qplib_qp_node { … }; #define BNXT_QPLIB_OOS_COUNT_MASK … #define FIRMWARE_INITIALIZED_FLAG … #define FIRMWARE_FIRST_FLAG … #define FIRMWARE_STALL_DETECTED … #define ERR_DEVICE_DETACHED … struct bnxt_qplib_cmdq_mbox { … }; struct bnxt_qplib_cmdq_ctx { … }; struct bnxt_qplib_creq_db { … }; struct bnxt_qplib_creq_stat { … }; struct bnxt_qplib_creq_ctx { … }; /* RCFW Communication Channels */ struct bnxt_qplib_rcfw { … }; struct bnxt_qplib_cmdqmsg { … }; static inline void bnxt_qplib_fill_cmdqmsg(struct bnxt_qplib_cmdqmsg *msg, void *req, void *resp, void *sb, u32 req_sz, u32 res_sz, u8 block) { … } void bnxt_qplib_free_rcfw_channel(struct bnxt_qplib_rcfw *rcfw); int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res, struct bnxt_qplib_rcfw *rcfw, struct bnxt_qplib_ctx *ctx, int qp_tbl_sz); void bnxt_qplib_rcfw_stop_irq(struct bnxt_qplib_rcfw *rcfw, bool kill); void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw); int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector, bool need_init); int bnxt_qplib_enable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw, int msix_vector, int cp_bar_reg_off, aeq_handler_t aeq_handler); struct bnxt_qplib_rcfw_sbuf *bnxt_qplib_rcfw_alloc_sbuf( struct bnxt_qplib_rcfw *rcfw, u32 size); void bnxt_qplib_rcfw_free_sbuf(struct bnxt_qplib_rcfw *rcfw, struct bnxt_qplib_rcfw_sbuf *sbuf); int bnxt_qplib_rcfw_send_message(struct bnxt_qplib_rcfw *rcfw, struct bnxt_qplib_cmdqmsg *msg); int bnxt_qplib_deinit_rcfw(struct bnxt_qplib_rcfw *rcfw); int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, struct bnxt_qplib_ctx *ctx, int is_virtfn); void bnxt_qplib_mark_qp_error(void *qp_handle); static inline u32 map_qp_id_to_tbl_indx(u32 qid, struct bnxt_qplib_rcfw *rcfw) { … } #endif /* __BNXT_QPLIB_RCFW_H__ */
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