linux/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c

// SPDX-License-Identifier: GPL-2.0
/*
 * sun8i-ce-core.c - hardware cryptographic offloader for
 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
 *
 * Copyright (C) 2015-2019 Corentin Labbe <[email protected]>
 *
 * Core file which registers crypto algorithms supported by the CryptoEngine.
 *
 * You could find a link for the datasheet in Documentation/arch/arm/sunxi.rst
 */

#include <crypto/engine.h>
#include <crypto/internal/hash.h>
#include <crypto/internal/rng.h>
#include <crypto/internal/skcipher.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>

#include "sun8i-ce.h"

/*
 * mod clock is lower on H3 than other SoC due to some DMA timeout occurring
 * with high value.
 * If you want to tune mod clock, loading driver and passing selftest is
 * insufficient, you need to test with some LUKS test (mount and write to it)
 */
static const struct ce_variant ce_h3_variant = …;

static const struct ce_variant ce_h5_variant = …;

static const struct ce_variant ce_h6_variant = …;

static const struct ce_variant ce_h616_variant = …;

static const struct ce_variant ce_a64_variant = …;

static const struct ce_variant ce_d1_variant = …;

static const struct ce_variant ce_r40_variant = …;

/*
 * sun8i_ce_get_engine_number() get the next channel slot
 * This is a simple round-robin way of getting the next channel
 * The flow 3 is reserve for xRNG operations
 */
int sun8i_ce_get_engine_number(struct sun8i_ce_dev *ce)
{ … }

int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
{ … }

static irqreturn_t ce_irq_handler(int irq, void *data)
{ … }

static struct sun8i_ce_alg_template ce_algs[] = …;

static int sun8i_ce_debugfs_show(struct seq_file *seq, void *v)
{ … }

DEFINE_SHOW_ATTRIBUTE(…);

static void sun8i_ce_free_chanlist(struct sun8i_ce_dev *ce, int i)
{ … }

/*
 * Allocate the channel list structure
 */
static int sun8i_ce_allocate_chanlist(struct sun8i_ce_dev *ce)
{ … }

/*
 * Power management strategy: The device is suspended unless a TFM exists for
 * one of the algorithms proposed by this driver.
 */
static int sun8i_ce_pm_suspend(struct device *dev)
{ … }

static int sun8i_ce_pm_resume(struct device *dev)
{ … }

static const struct dev_pm_ops sun8i_ce_pm_ops = …;

static int sun8i_ce_pm_init(struct sun8i_ce_dev *ce)
{ … }

static void sun8i_ce_pm_exit(struct sun8i_ce_dev *ce)
{ … }

static int sun8i_ce_get_clks(struct sun8i_ce_dev *ce)
{ … }

static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
{ … }

static void sun8i_ce_unregister_algs(struct sun8i_ce_dev *ce)
{ … }

static int sun8i_ce_probe(struct platform_device *pdev)
{ … }

static void sun8i_ce_remove(struct platform_device *pdev)
{ … }

static const struct of_device_id sun8i_ce_crypto_of_match_table[] = …;
MODULE_DEVICE_TABLE(of, sun8i_ce_crypto_of_match_table);

static struct platform_driver sun8i_ce_driver = …;

module_platform_driver(…) …;

MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_AUTHOR(…) …;