clk-mt6779.c | Explore in Territory

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2019 MediaTek Inc.
 * Author: Wendell Lin <[email protected]>
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "clk-gate.h"
#include "clk-mtk.h"
#include "clk-mux.h"
#include "clk-pll.h"

#include <dt-bindings/clock/mt6779-clk.h>

static DEFINE_SPINLOCK(mt6779_clk_lock);

static const struct mtk_fixed_clk top_fixed_clks[] = …;

static const struct mtk_fixed_factor top_divs[] = …;

static const char * const axi_parents[] = …;

static const char * const mm_parents[] = …;

static const char * const scp_parents[] = …;

static const char * const img_parents[] = …;

static const char * const ipe_parents[] = …;

static const char * const dpe_parents[] = …;

static const char * const cam_parents[] = …;

static const char * const ccu_parents[] = …;

static const char * const dsp_parents[] = …;

static const char * const dsp1_parents[] = …;

static const char * const dsp2_parents[] = …;

static const char * const dsp3_parents[] = …;

static const char * const ipu_if_parents[] = …;

static const char * const mfg_parents[] = …;

static const char * const f52m_mfg_parents[] = …;

static const char * const camtg_parents[] = …;

static const char * const camtg2_parents[] = …;

static const char * const camtg3_parents[] = …;

static const char * const camtg4_parents[] = …;

static const char * const uart_parents[] = …;

static const char * const spi_parents[] = …;

static const char * const msdc50_hclk_parents[] = …;

static const char * const msdc50_0_parents[] = …;

static const char * const msdc30_1_parents[] = …;

static const char * const audio_parents[] = …;

static const char * const aud_intbus_parents[] = …;

static const char * const fpwrap_ulposc_parents[] = …;

static const char * const atb_parents[] = …;

static const char * const sspm_parents[] = …;

static const char * const dpi0_parents[] = …;

static const char * const scam_parents[] = …;

static const char * const disppwm_parents[] = …;

static const char * const usb_top_parents[] = …;

static const char * const ssusb_top_xhci_parents[] = …;

static const char * const spm_parents[] = …;

static const char * const i2c_parents[] = …;

static const char * const seninf_parents[] = …;

static const char * const seninf1_parents[] = …;

static const char * const seninf2_parents[] = …;

static const char * const dxcc_parents[] = …;

static const char * const aud_engen1_parents[] = …;

static const char * const aud_engen2_parents[] = …;

static const char * const faes_ufsfde_parents[] = …;

static const char * const fufs_parents[] = …;

static const char * const aud_1_parents[] = …;

static const char * const aud_2_parents[] = …;

static const char * const adsp_parents[] = …;

static const char * const dpmaif_parents[] = …;

static const char * const venc_parents[] = …;

static const char * const vdec_parents[] = …;

static const char * const camtm_parents[] = …;

static const char * const pwm_parents[] = …;

static const char * const audio_h_parents[] = …;

static const char * const camtg5_parents[] = …;

/*
 * CRITICAL CLOCK:
 * axi_sel is the main bus clock of whole SOC.
 * spm_sel is the clock of the always-on co-processor.
 * sspm_sel is the clock of the always-on co-processor.
 */
static const struct mtk_mux top_muxes[] = …;

static const char * const i2s0_m_ck_parents[] = …;

static const char * const i2s1_m_ck_parents[] = …;

static const char * const i2s2_m_ck_parents[] = …;

static const char * const i2s3_m_ck_parents[] = …;

static const char * const i2s4_m_ck_parents[] = …;

static const char * const i2s5_m_ck_parents[] = …;

static const struct mtk_composite top_aud_muxes[] = …;

static struct mtk_composite top_aud_divs[] = …;

static const struct mtk_gate_regs infra0_cg_regs = …;

static const struct mtk_gate_regs infra1_cg_regs = …;

static const struct mtk_gate_regs infra2_cg_regs = …;

static const struct mtk_gate_regs infra3_cg_regs = …;

#define GATE_INFRA0(_id, _name, _parent, _shift) …
#define GATE_INFRA1(_id, _name, _parent, _shift) …
#define GATE_INFRA2(_id, _name, _parent, _shift) …
#define GATE_INFRA3(_id, _name, _parent, _shift) …

static const struct mtk_gate infra_clks[] = …;

static const struct mtk_gate_regs apmixed_cg_regs = …;

#define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) …

#define GATE_APMIXED(_id, _name, _parent, _shift) …

/*
 * CRITICAL CLOCK:
 * apmixed_appll26m is the toppest clock gate of all PLLs.
 */
static const struct mtk_gate apmixed_clks[] = …;

#define MT6779_PLL_FMAX …
#define MT6779_PLL_FMIN …

#define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags,		\
			_rst_bar_mask, _pcwbits, _pcwibits, _pd_reg,	\
			_pd_shift, _tuner_reg,  _tuner_en_reg,		\
			_tuner_en_bit, _pcw_reg, _pcw_shift,		\
			_pcw_chg_reg, _div_table) …

#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags,		\
			_rst_bar_mask, _pcwbits, _pcwibits, _pd_reg,	\
			_pd_shift, _tuner_reg, _tuner_en_reg,		\
			_tuner_en_bit, _pcw_reg, _pcw_shift,		\
			_pcw_chg_reg) …

static const struct mtk_pll_data plls[] = …;

static int clk_mt6779_apmixed_probe(struct platform_device *pdev)
{ … }

static int clk_mt6779_top_probe(struct platform_device *pdev)
{ … }

static const struct of_device_id of_match_clk_mt6779[] = …;

static int clk_mt6779_probe(struct platform_device *pdev)
{ … }

static const struct mtk_clk_desc infra_desc = …;

static const struct of_device_id of_match_clk_mt6779_infra[] = …;
MODULE_DEVICE_TABLE(of, of_match_clk_mt6779);

static struct platform_driver clk_mt6779_infra_drv  = …;

static struct platform_driver clk_mt6779_drv = …;

static int __init clk_mt6779_init(void)
{ … }

arch_initcall(clk_mt6779_init);

MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
linux/drivers/clk/mediatek/clk-mt6779.c
